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https://github.com/g4klx/DMRGateway
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Add optional names for each network for use in the log,
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@@ -24,7 +24,7 @@
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#include <cstdio>
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#include <cassert>
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CPassAllPC::CPassAllPC(const char* name, unsigned int slot) :
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CPassAllPC::CPassAllPC(const std::string& name, unsigned int slot) :
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m_name(name),
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m_slot(slot)
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{
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@@ -43,7 +43,7 @@ bool CPassAllPC::process(CDMRData& data, bool trace)
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bool ret = (flco == FLCO_USER_USER && slotNo == m_slot);
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if (trace)
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LogDebug("Rule Trace,\tPassAllPC %s Slot=%u: %s", m_name, m_slot, ret ? "matched" : "not matched");
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LogDebug("Rule Trace,\tPassAllPC %s Slot=%u: %s", m_name.c_str(), m_slot, ret ? "matched" : "not matched");
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return ret;
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}
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