mirror of
https://github.com/g4klx/DMRGateway
synced 2025-12-21 21:45:39 +08:00
Add a range to the SrcRewrite and a new config.
This commit is contained in:
12
Conf.cpp
12
Conf.cpp
@@ -247,13 +247,15 @@ bool CConf::read()
|
|||||||
char* p1 = ::strtok(value, ", ");
|
char* p1 = ::strtok(value, ", ");
|
||||||
char* p2 = ::strtok(NULL, ", ");
|
char* p2 = ::strtok(NULL, ", ");
|
||||||
char* p3 = ::strtok(NULL, ", ");
|
char* p3 = ::strtok(NULL, ", ");
|
||||||
char* p4 = ::strtok(NULL, " \r\n");
|
char* p4 = ::strtok(NULL, ", ");
|
||||||
if (p1 != NULL && p2 != NULL && p3 != NULL && p4 != NULL) {
|
char* p5 = ::strtok(NULL, " \r\n");
|
||||||
|
if (p1 != NULL && p2 != NULL && p3 != NULL && p4 != NULL && p5 != NULL) {
|
||||||
CSrcRewriteStruct rewrite;
|
CSrcRewriteStruct rewrite;
|
||||||
rewrite.m_fromSlot = ::atoi(p1);
|
rewrite.m_fromSlot = ::atoi(p1);
|
||||||
rewrite.m_fromId = ::atoi(p2);
|
rewrite.m_fromId = ::atoi(p2);
|
||||||
rewrite.m_toSlot = ::atoi(p3);
|
rewrite.m_toSlot = ::atoi(p3);
|
||||||
rewrite.m_toTG = ::atoi(p4);
|
rewrite.m_toTG = ::atoi(p4);
|
||||||
|
rewrite.m_range = ::atoi(p5);
|
||||||
m_dmrNetwork1SrcRewrites.push_back(rewrite);
|
m_dmrNetwork1SrcRewrites.push_back(rewrite);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -319,13 +321,15 @@ bool CConf::read()
|
|||||||
char* p1 = ::strtok(value, ", ");
|
char* p1 = ::strtok(value, ", ");
|
||||||
char* p2 = ::strtok(NULL, ", ");
|
char* p2 = ::strtok(NULL, ", ");
|
||||||
char* p3 = ::strtok(NULL, ", ");
|
char* p3 = ::strtok(NULL, ", ");
|
||||||
char* p4 = ::strtok(NULL, " \r\n");
|
char* p4 = ::strtok(NULL, ", ");
|
||||||
if (p1 != NULL && p2 != NULL && p3 != NULL && p4 != NULL) {
|
char* p5 = ::strtok(NULL, " \r\n");
|
||||||
|
if (p1 != NULL && p2 != NULL && p3 != NULL && p4 != NULL && p5 != NULL) {
|
||||||
CSrcRewriteStruct rewrite;
|
CSrcRewriteStruct rewrite;
|
||||||
rewrite.m_fromSlot = ::atoi(p1);
|
rewrite.m_fromSlot = ::atoi(p1);
|
||||||
rewrite.m_fromId = ::atoi(p2);
|
rewrite.m_fromId = ::atoi(p2);
|
||||||
rewrite.m_toSlot = ::atoi(p3);
|
rewrite.m_toSlot = ::atoi(p3);
|
||||||
rewrite.m_toTG = ::atoi(p4);
|
rewrite.m_toTG = ::atoi(p4);
|
||||||
|
rewrite.m_range = ::atoi(p5);
|
||||||
m_dmrNetwork2SrcRewrites.push_back(rewrite);
|
m_dmrNetwork2SrcRewrites.push_back(rewrite);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
1
Conf.h
1
Conf.h
@@ -50,6 +50,7 @@ struct CSrcRewriteStruct {
|
|||||||
unsigned int m_fromId;
|
unsigned int m_fromId;
|
||||||
unsigned int m_toSlot;
|
unsigned int m_toSlot;
|
||||||
unsigned int m_toTG;
|
unsigned int m_toTG;
|
||||||
|
unsigned int m_range;
|
||||||
};
|
};
|
||||||
|
|
||||||
class CConf
|
class CConf
|
||||||
|
|||||||
@@ -639,9 +639,9 @@ bool CDMRGateway::createDMRNetwork1()
|
|||||||
|
|
||||||
std::vector<CSrcRewriteStruct> srcRewrites = m_conf.getDMRNetwork1SrcRewrites();
|
std::vector<CSrcRewriteStruct> srcRewrites = m_conf.getDMRNetwork1SrcRewrites();
|
||||||
for (std::vector<CSrcRewriteStruct>::const_iterator it = srcRewrites.begin(); it != srcRewrites.end(); ++it) {
|
for (std::vector<CSrcRewriteStruct>::const_iterator it = srcRewrites.begin(); it != srcRewrites.end(); ++it) {
|
||||||
LogInfo(" Rewrite Net: %u:%u -> %u:TG%u", (*it).m_fromSlot, (*it).m_fromId, (*it).m_toSlot, (*it).m_toTG);
|
LogInfo(" Rewrite Net: %u:%u-%u -> %u:TG%u", (*it).m_fromSlot, (*it).m_fromId, (*it).m_fromId + (*it).m_range - 1U, (*it).m_toSlot, (*it).m_toTG);
|
||||||
|
|
||||||
CRewriteSrc* rewrite = new CRewriteSrc("DMR-1", (*it).m_fromSlot, (*it).m_fromId, (*it).m_toSlot, (*it).m_toTG);
|
CRewriteSrc* rewrite = new CRewriteSrc("DMR-1", (*it).m_fromSlot, (*it).m_fromId, (*it).m_toSlot, (*it).m_toTG, (*it).m_range);
|
||||||
|
|
||||||
m_dmr1NetRewrites.push_back(rewrite);
|
m_dmr1NetRewrites.push_back(rewrite);
|
||||||
}
|
}
|
||||||
@@ -722,9 +722,9 @@ bool CDMRGateway::createDMRNetwork2()
|
|||||||
|
|
||||||
std::vector<CSrcRewriteStruct> srcRewrites = m_conf.getDMRNetwork2SrcRewrites();
|
std::vector<CSrcRewriteStruct> srcRewrites = m_conf.getDMRNetwork2SrcRewrites();
|
||||||
for (std::vector<CSrcRewriteStruct>::const_iterator it = srcRewrites.begin(); it != srcRewrites.end(); ++it) {
|
for (std::vector<CSrcRewriteStruct>::const_iterator it = srcRewrites.begin(); it != srcRewrites.end(); ++it) {
|
||||||
LogInfo(" Rewrite Net: %u:%u -> %u:TG%u", (*it).m_fromSlot, (*it).m_fromId, (*it).m_toSlot, (*it).m_toTG);
|
LogInfo(" Rewrite Net: %u:%u-%u -> %u:TG%u", (*it).m_fromSlot, (*it).m_fromId, (*it).m_fromId + (*it).m_range - 1U, (*it).m_toSlot, (*it).m_toTG);
|
||||||
|
|
||||||
CRewriteSrc* rewrite = new CRewriteSrc("DMR-2", (*it).m_fromSlot, (*it).m_fromId, (*it).m_toSlot, (*it).m_toTG);
|
CRewriteSrc* rewrite = new CRewriteSrc("DMR-2", (*it).m_fromSlot, (*it).m_fromId, (*it).m_toSlot, (*it).m_toTG, (*it).m_range);
|
||||||
|
|
||||||
m_dmr2NetRewrites.push_back(rewrite);
|
m_dmr2NetRewrites.push_back(rewrite);
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -25,31 +25,41 @@ Address=xlx950.epf.lu
|
|||||||
Port=62030
|
Port=62030
|
||||||
# Local=3351
|
# Local=3351
|
||||||
# Options=
|
# Options=
|
||||||
Slot=2
|
Slot=1
|
||||||
TG=9
|
TG=8
|
||||||
Password=passw0rd
|
Password=passw0rd
|
||||||
Debug=0
|
Debug=0
|
||||||
|
|
||||||
|
# BrandMeister
|
||||||
[DMR Network 1]
|
[DMR Network 1]
|
||||||
Enabled=1
|
Enabled=1
|
||||||
Address=44.131.4.1
|
Address=44.131.4.1
|
||||||
Port=62031
|
Port=62031
|
||||||
# Local=3352
|
# Local=3352
|
||||||
TGRewrite=1,9,1,9,1
|
# Local cluster
|
||||||
PCRewrite=2,4000,2,4000,1000
|
TGRewrite=1,9,1,9
|
||||||
SrcRewrite=2,12345,2,9
|
# Reflector TG on to slot 2 TG9
|
||||||
|
TGRewrite=2,9,2,9
|
||||||
|
# Reflector control command slot 2 94000->4000 to 95000->5000
|
||||||
|
PCRewrite=2,94000,2,4000,1001
|
||||||
|
# Echo on slot 1 9990
|
||||||
|
PCRewrite=1,9990,2,9990,1
|
||||||
|
# Reflector status returns
|
||||||
|
SrcRewrite=2,4000,2,9,1001
|
||||||
Password=PASSWORD
|
Password=PASSWORD
|
||||||
Debug=0
|
Debug=0
|
||||||
|
|
||||||
|
# DMR+
|
||||||
[DMR Network 2]
|
[DMR Network 2]
|
||||||
Enabled=0
|
Enabled=0
|
||||||
Address=44.131.4.1
|
Address=44.131.4.1
|
||||||
Port=55555
|
Port=55555
|
||||||
# Local=3352
|
# Local=3352
|
||||||
TGRewrite=2,9,2,9,1
|
# Reflector TG on to slot 2 TG8
|
||||||
PCRewrite=2,6000,2,4000,1000
|
TGRewrite=2,8,2,9
|
||||||
TypeRewrite=1,2351,1,2351
|
# Echo on slot 2 TG9990
|
||||||
TypeRewrite=1,235,1,235
|
TGRewrite=2,9990,2,9990,1
|
||||||
TypeRewrite=2,9,2,9
|
# Reflector control command slot 2 84000->4000 to 85000->5000
|
||||||
|
PCRewrite=2,84000,2,4000,1001
|
||||||
Password=PASSWORD
|
Password=PASSWORD
|
||||||
Debug=0
|
Debug=0
|
||||||
|
|||||||
@@ -25,13 +25,14 @@
|
|||||||
#include <cstdio>
|
#include <cstdio>
|
||||||
#include <cassert>
|
#include <cassert>
|
||||||
|
|
||||||
CRewriteSrc::CRewriteSrc(const char* name, unsigned int fromSlot, unsigned int fromId, unsigned int toSlot, unsigned int toTG) :
|
CRewriteSrc::CRewriteSrc(const char* name, unsigned int fromSlot, unsigned int fromId, unsigned int toSlot, unsigned int toTG, unsigned int range) :
|
||||||
m_name(name),
|
m_name(name),
|
||||||
m_fromSlot(fromSlot),
|
m_fromSlot(fromSlot),
|
||||||
m_fromId(fromId),
|
m_fromIdStart(fromId),
|
||||||
|
m_fromIdEnd(fromId + range),
|
||||||
m_toSlot(toSlot),
|
m_toSlot(toSlot),
|
||||||
m_toTG(toTG),
|
m_toTG(toTG),
|
||||||
m_lc(FLCO_GROUP, fromId, toTG),
|
m_lc(FLCO_GROUP, 0U, toTG),
|
||||||
m_embeddedLC()
|
m_embeddedLC()
|
||||||
{
|
{
|
||||||
assert(fromSlot == 1U || fromSlot == 2U);
|
assert(fromSlot == 1U || fromSlot == 2U);
|
||||||
@@ -50,7 +51,7 @@ bool CRewriteSrc::process(CDMRData& data)
|
|||||||
unsigned int srcId = data.getSrcId();
|
unsigned int srcId = data.getSrcId();
|
||||||
unsigned int slotNo = data.getSlotNo();
|
unsigned int slotNo = data.getSlotNo();
|
||||||
|
|
||||||
if (flco != FLCO_USER_USER || slotNo != m_fromSlot || srcId != m_fromId)
|
if (flco != FLCO_USER_USER || slotNo != m_fromSlot || srcId < m_fromIdStart || srcId >= m_fromIdEnd)
|
||||||
return false;
|
return false;
|
||||||
|
|
||||||
if (m_fromSlot != m_toSlot)
|
if (m_fromSlot != m_toSlot)
|
||||||
@@ -82,6 +83,12 @@ bool CRewriteSrc::process(CDMRData& data)
|
|||||||
|
|
||||||
void CRewriteSrc::processHeader(CDMRData& data, unsigned char dataType)
|
void CRewriteSrc::processHeader(CDMRData& data, unsigned char dataType)
|
||||||
{
|
{
|
||||||
|
unsigned int srcId = data.getSrcId();
|
||||||
|
if (srcId != m_lc.getSrcId()) {
|
||||||
|
m_lc.setSrcId(srcId);
|
||||||
|
m_embeddedLC.setLC(m_lc);
|
||||||
|
}
|
||||||
|
|
||||||
unsigned char buffer[DMR_FRAME_LENGTH_BYTES];
|
unsigned char buffer[DMR_FRAME_LENGTH_BYTES];
|
||||||
data.getData(buffer);
|
data.getData(buffer);
|
||||||
|
|
||||||
@@ -93,6 +100,12 @@ void CRewriteSrc::processHeader(CDMRData& data, unsigned char dataType)
|
|||||||
|
|
||||||
void CRewriteSrc::processVoice(CDMRData& data)
|
void CRewriteSrc::processVoice(CDMRData& data)
|
||||||
{
|
{
|
||||||
|
unsigned int srcId = data.getSrcId();
|
||||||
|
if (srcId != m_lc.getSrcId()) {
|
||||||
|
m_lc.setSrcId(srcId);
|
||||||
|
m_embeddedLC.setLC(m_lc);
|
||||||
|
}
|
||||||
|
|
||||||
unsigned char buffer[DMR_FRAME_LENGTH_BYTES];
|
unsigned char buffer[DMR_FRAME_LENGTH_BYTES];
|
||||||
data.getData(buffer);
|
data.getData(buffer);
|
||||||
|
|
||||||
|
|||||||
@@ -26,7 +26,7 @@
|
|||||||
|
|
||||||
class CRewriteSrc : public IRewrite {
|
class CRewriteSrc : public IRewrite {
|
||||||
public:
|
public:
|
||||||
CRewriteSrc(const char* name, unsigned int fromSlot, unsigned int fromId, unsigned int toSlot, unsigned int toTG);
|
CRewriteSrc(const char* name, unsigned int fromSlot, unsigned int fromId, unsigned int toSlot, unsigned int toTG, unsigned int range);
|
||||||
virtual ~CRewriteSrc();
|
virtual ~CRewriteSrc();
|
||||||
|
|
||||||
virtual bool process(CDMRData& data);
|
virtual bool process(CDMRData& data);
|
||||||
@@ -34,7 +34,8 @@ public:
|
|||||||
private:
|
private:
|
||||||
const char* m_name;
|
const char* m_name;
|
||||||
unsigned int m_fromSlot;
|
unsigned int m_fromSlot;
|
||||||
unsigned int m_fromId;
|
unsigned int m_fromIdStart;
|
||||||
|
unsigned int m_fromIdEnd;
|
||||||
unsigned int m_toSlot;
|
unsigned int m_toSlot;
|
||||||
unsigned int m_toTG;
|
unsigned int m_toTG;
|
||||||
CDMRLC m_lc;
|
CDMRLC m_lc;
|
||||||
|
|||||||
Reference in New Issue
Block a user