MMDVM/DMRGateway
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Add a fifth DMR network. This has not been tested nor even compiled.

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This commit is contained in:
Jonathan Naylor
2019-07-17 08:21:52 +01:00
parent 4204bd1091
commit 82d0b06db1
7 changed files with 593 additions and 58 deletions
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355
DMRGateway.cpp
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@@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016,2017,2018 by Jonathan Naylor G4KLX
* Copyright (C) 2015-2019 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -74,6 +74,7 @@ enum DMRGW_STATUS {
DMRGWS_DMRNETWORK2,
DMRGWS_DMRNETWORK3,
DMRGWS_DMRNETWORK4,
DMRGWS_DMRNETWORK5,
DMRGWS_XLXREFLECTOR
};
@@ -145,6 +146,8 @@ m_dmrNetwork3(NULL),
m_dmr3Name(),
m_dmrNetwork4(NULL),
m_dmr4Name(),
m_dmrNetwork5(NULL),
m_dmr5Name(),
m_xlxReflectors(NULL),
m_xlxNetwork(NULL),
m_xlxId(0U),
@@ -177,9 +180,14 @@ m_dmr3SrcRewrites(),
m_dmr4NetRewrites(),
m_dmr4RFRewrites(),
m_dmr4SrcRewrites(),
m_dmr5NetRewrites(),
m_dmr5RFRewrites(),
m_dmr5SrcRewrites(),
m_dmr1Passalls(),
m_dmr2Passalls(),
m_dmr3Passalls()
m_dmr3Passalls(),
m_dmr4Passalls(),
m_dmr5Passalls()
{
m_config = new unsigned char[400U];
}
@@ -222,6 +230,15 @@ CDMRGateway::~CDMRGateway()
for (std::vector<CRewrite*>::iterator it = m_dmr4SrcRewrites.begin(); it != m_dmr4SrcRewrites.end(); ++it)
delete *it;
for (std::vector<CRewrite*>::iterator it = m_dmr5NetRewrites.begin(); it != m_dmr5NetRewrites.end(); ++it)
delete *it;
for (std::vector<CRewrite*>::iterator it = m_dmr5RFRewrites.begin(); it != m_dmr5RFRewrites.end(); ++it)
delete *it;
for (std::vector<CRewrite*>::iterator it = m_dmr5SrcRewrites.begin(); it != m_dmr5SrcRewrites.end(); ++it)
delete *it;
for (std::vector<CRewrite*>::iterator it = m_dmr1Passalls.begin(); it != m_dmr1Passalls.end(); ++it)
delete *it;
@@ -234,6 +251,9 @@ CDMRGateway::~CDMRGateway()
for (std::vector<CRewrite*>::iterator it = m_dmr4Passalls.begin(); it != m_dmr4Passalls.end(); ++it)
delete *it;
for (std::vector<CRewrite*>::iterator it = m_dmr5Passalls.begin(); it != m_dmr5Passalls.end(); ++it)
delete *it;
delete m_rptRewrite;
delete m_xlxRewrite;
@@ -376,6 +396,12 @@ int CDMRGateway::run()
return 1;
}
if (m_conf.getDMRNetwork5Enabled()) {
ret = createDMRNetwork5();
if (!ret)
return 1;
}
if (m_conf.getXLXNetworkEnabled()) {
ret = createXLXNetwork();
if (!ret)
@@ -431,6 +457,10 @@ int CDMRGateway::run()
unsigned int dmr4DstId[3U];
dmr4SrcId[1U] = dmr4SrcId[2U] = dmr4DstId[1U] = dmr4DstId[2U] = 0U;
unsigned int dmr5SrcId[3U];
unsigned int dmr5DstId[3U];
dmr5SrcId[1U] = dmr5SrcId[2U] = dmr5DstId[1U] = dmr5DstId[2U] = 0U;
CStopWatch stopWatch;
stopWatch.start();
@@ -635,49 +665,72 @@ int CDMRGateway::run()
}
}
}
}
if (!rewritten) {
if (m_dmrNetwork3 != NULL) {
// Rewrite the slot and/or TG or neither
for (std::vector<CRewrite*>::iterator it = m_dmr3RFRewrites.begin(); it != m_dmr3RFRewrites.end(); ++it) {
bool ret = (*it)->process(data, trace);
if (ret) {
rewritten = true;
break;
}
}
if (rewritten) {
if (status[slotNo] == DMRGWS_NONE || status[slotNo] == DMRGWS_DMRNETWORK3) {
rewrite(m_dmr3SrcRewrites, data, trace);
m_dmrNetwork3->write(data);
status[slotNo] = DMRGWS_DMRNETWORK3;
timer[slotNo]->setTimeout(rfTimeout);
timer[slotNo]->start();
}
if (!rewritten) {
if (m_dmrNetwork3 != NULL) {
// Rewrite the slot and/or TG or neither
for (std::vector<CRewrite*>::iterator it = m_dmr3RFRewrites.begin(); it != m_dmr3RFRewrites.end(); ++it) {
bool ret = (*it)->process(data, trace);
if (ret) {
rewritten = true;
break;
}
}
if (!rewritten) {
if (m_dmrNetwork4 != NULL) {
// Rewrite the slot and/or TG or neither
for (std::vector<CRewrite*>::iterator it = m_dmr4RFRewrites.begin(); it != m_dmr4RFRewrites.end(); ++it) {
bool ret = (*it)->process(data, trace);
if (ret) {
rewritten = true;
break;
}
}
if (rewritten) {
if (status[slotNo] == DMRGWS_NONE || status[slotNo] == DMRGWS_DMRNETWORK3) {
rewrite(m_dmr3SrcRewrites, data, trace);
m_dmrNetwork3->write(data);
status[slotNo] = DMRGWS_DMRNETWORK3;
timer[slotNo]->setTimeout(rfTimeout);
timer[slotNo]->start();
}
}
}
}
if (rewritten) {
if (status[slotNo] == DMRGWS_NONE || status[slotNo] == DMRGWS_DMRNETWORK4) {
rewrite(m_dmr4SrcRewrites, data, trace);
m_dmrNetwork4->write(data);
status[slotNo] = DMRGWS_DMRNETWORK4;
timer[slotNo]->setTimeout(rfTimeout);
timer[slotNo]->start();
}
}
if (!rewritten) {
if (m_dmrNetwork4 != NULL) {
// Rewrite the slot and/or TG or neither
for (std::vector<CRewrite*>::iterator it = m_dmr4RFRewrites.begin(); it != m_dmr4RFRewrites.end(); ++it) {
bool ret = (*it)->process(data, trace);
if (ret) {
rewritten = true;
break;
}
}
if (rewritten) {
if (status[slotNo] == DMRGWS_NONE || status[slotNo] == DMRGWS_DMRNETWORK4) {
rewrite(m_dmr4SrcRewrites, data, trace);
m_dmrNetwork4->write(data);
status[slotNo] = DMRGWS_DMRNETWORK4;
timer[slotNo]->setTimeout(rfTimeout);
timer[slotNo]->start();
}
}
}
}
if (!rewritten) {
if (m_dmrNetwork5 != NULL) {
// Rewrite the slot and/or TG or neither
for (std::vector<CRewrite*>::iterator it = m_dmr5RFRewrites.begin(); it != m_dmr5RFRewrites.end(); ++it) {
bool ret = (*it)->process(data, trace);
if (ret) {
rewritten = true;
break;
}
}
if (rewritten) {
if (status[slotNo] == DMRGWS_NONE || status[slotNo] == DMRGWS_DMRNETWORK5) {
rewrite(m_dmr5SrcRewrites, data, trace);
m_dmrNetwork5->write(data);
status[slotNo] = DMRGWS_DMRNETWORK5;
timer[slotNo]->setTimeout(rfTimeout);
timer[slotNo]->start();
}
}
}
@@ -771,6 +824,28 @@ int CDMRGateway::run()
}
}
if (!rewritten) {
if (m_dmrNetwork5 != NULL) {
for (std::vector<CRewrite*>::iterator it = m_dmr5Passalls.begin(); it != m_dmr5Passalls.end(); ++it) {
bool ret = (*it)->process(data, trace);
if (ret) {
rewritten = true;
break;
}
}
if (rewritten) {
if (status[slotNo] == DMRGWS_NONE || status[slotNo] == DMRGWS_DMRNETWORK5) {
rewrite(m_dmr5SrcRewrites, data, trace);
m_dmrNetwork5->write(data);
status[slotNo] = DMRGWS_DMRNETWORK5;
timer[slotNo]->setTimeout(rfTimeout);
timer[slotNo]->start();
}
}
}
}
if (!rewritten && trace)
LogDebug("Rule Trace,\tnot matched so rejected");
}
@@ -988,6 +1063,54 @@ int CDMRGateway::run()
m_repeater->writeBeacon();
}
if (m_dmrNetwork5 != NULL) {
ret = m_dmrNetwork5->read(data);
if (ret) {
unsigned int slotNo = data.getSlotNo();
unsigned int srcId = data.getSrcId();
unsigned int dstId = data.getDstId();
FLCO flco = data.getFLCO();
bool trace = false;
if (ruleTrace && (srcId != dmr5SrcId[slotNo] || dstId != dmr5DstId[slotNo])) {
dmr5SrcId[slotNo] = srcId;
dmr5DstId[slotNo] = dstId;
trace = true;
}
if (trace)
LogDebug("Rule Trace, network 5 transmission: Slot=%u Src=%u Dst=%s%u", slotNo, srcId, flco == FLCO_GROUP ? "TG" : "", dstId);
// Rewrite the slot and/or TG or neither
bool rewritten = false;
for (std::vector<CRewrite*>::iterator it = m_dmr5NetRewrites.begin(); it != m_dmr5NetRewrites.end(); ++it) {
bool ret = (*it)->process(data, trace);
if (ret) {
rewritten = true;
break;
}
}
if (rewritten) {
// Check that the rewritten slot is free to use.
slotNo = data.getSlotNo();
if (status[slotNo] == DMRGWS_NONE || status[slotNo] == DMRGWS_DMRNETWORK5) {
m_repeater->write(data);
status[slotNo] = DMRGWS_DMRNETWORK5;
timer[slotNo]->setTimeout(netTimeout);
timer[slotNo]->start();
}
}
if (!rewritten && trace)
LogDebug("Rule Trace,\tnot matched so rejected");
}
ret = m_dmrNetwork5->wantsBeacon();
if (ret)
m_repeater->writeBeacon();
}
unsigned char buffer[50U];
unsigned int length;
ret = m_repeater->readRadioPosition(buffer, length);
@@ -1002,6 +1125,8 @@ int CDMRGateway::run()
m_dmrNetwork3->writeRadioPosition(buffer, length);
if (m_dmrNetwork4 != NULL)
m_dmrNetwork4->writeRadioPosition(buffer, length);
if (m_dmrNetwork5 != NULL)
m_dmrNetwork5->writeRadioPosition(buffer, length);
}
ret = m_repeater->readTalkerAlias(buffer, length);
if (ret) {
@@ -1015,6 +1140,8 @@ int CDMRGateway::run()
m_dmrNetwork3->writeTalkerAlias(buffer, length);
if (m_dmrNetwork4 != NULL)
m_dmrNetwork4->writeTalkerAlias(buffer, length);
if (m_dmrNetwork5 != NULL)
m_dmrNetwork5->writeTalkerAlias(buffer, length);
}
ret = m_repeater->readHomePosition(buffer, length);
if (ret) {
@@ -1028,6 +1155,8 @@ int CDMRGateway::run()
m_dmrNetwork3->writeHomePosition(buffer, length);
if (m_dmrNetwork4 != NULL)
m_dmrNetwork4->writeHomePosition(buffer, length);
if (m_dmrNetwork5 != NULL)
m_dmrNetwork5->writeHomePosition(buffer, length);
}
if (voice != NULL) {
@@ -1059,6 +1188,9 @@ int CDMRGateway::run()
if (m_dmrNetwork4 != NULL)
m_dmrNetwork4->clock(ms);
if (m_dmrNetwork5 != NULL)
m_dmrNetwork5->clock(ms);
if (m_xlxNetwork != NULL)
m_xlxNetwork->clock(ms);
@@ -1105,6 +1237,11 @@ int CDMRGateway::run()
delete m_dmrNetwork4;
}
if (m_dmrNetwork5 != NULL) {
m_dmrNetwork5->close();
delete m_dmrNetwork5;
}
if (m_xlxNetwork != NULL) {
m_xlxNetwork->close();
delete m_xlxNetwork;
@@ -1696,6 +1833,144 @@ bool CDMRGateway::createDMRNetwork4()
return true;
}
bool CDMRGateway::createDMRNetwork5()
{
std::string address = m_conf.getDMRNetwork5Address();
unsigned int port = m_conf.getDMRNetwork5Port();
unsigned int local = m_conf.getDMRNetwork5Local();
unsigned int id = m_conf.getDMRNetwork5Id();
std::string password = m_conf.getDMRNetwork5Password();
bool location = m_conf.getDMRNetwork5Location();
bool debug = m_conf.getDMRNetwork5Debug();
m_dmr5Name = m_conf.getDMRNetwork5Name();
if (id == 0U)
id = m_repeater->getId();
LogInfo("DMR Network 5 Parameters");
LogInfo(" Name: %s", m_dmr5Name.c_str());
LogInfo(" Id: %u", id);
LogInfo(" Address: %s", address.c_str());
LogInfo(" Port: %u", port);
if (local > 0U)
LogInfo(" Local: %u", local);
else
LogInfo(" Local: random");
LogInfo(" Location Data: %s", location ? "yes" : "no");
m_dmrNetwork5 = new CDMRNetwork(address, port, local, id, password, m_dmr5Name, VERSION, debug);
std::string options = m_conf.getDMRNetwork5Options();
if (options.empty())
options = m_repeater->getOptions();
if (!options.empty()) {
LogInfo(" Options: %s", options.c_str());
m_dmrNetwork5->setOptions(options);
}
unsigned char config[400U];
unsigned int len = getConfig(m_dmr5Name, config);
if (!location)
::memcpy(config + 30U, "0.00000000.000000", 17U);
m_dmrNetwork5->setConfig(config, len);
bool ret = m_dmrNetwork5->open();
if (!ret) {
delete m_dmrNetwork5;
m_dmrNetwork5 = NULL;
return false;
}
std::vector<CTGRewriteStruct> tgRewrites = m_conf.getDMRNetwork5TGRewrites();
for (std::vector<CTGRewriteStruct>::const_iterator it = tgRewrites.begin(); it != tgRewrites.end(); ++it) {
if ((*it).m_range == 1)
LogInfo(" Rewrite RF: %u:TG%u -> %u:TG%u", (*it).m_fromSlot, (*it).m_fromTG, (*it).m_toSlot, (*it).m_toTG);
else
LogInfo(" Rewrite RF: %u:TG%u-TG%u -> %u:TG%u-TG%u", (*it).m_fromSlot, (*it).m_fromTG, (*it).m_fromTG + (*it).m_range - 1U, (*it).m_toSlot, (*it).m_toTG, (*it).m_toTG + (*it).m_range - 1U);
if ((*it).m_range == 1)
LogInfo(" Rewrite Net: %u:TG%u -> %u:TG%u", (*it).m_toSlot, (*it).m_toTG, (*it).m_fromSlot, (*it).m_fromTG);
else
LogInfo(" Rewrite Net: %u:TG%u-TG%u -> %u:TG%u-TG%u", (*it).m_toSlot, (*it).m_toTG, (*it).m_toTG + (*it).m_range - 1U, (*it).m_fromSlot, (*it).m_fromTG, (*it).m_fromTG + (*it).m_range - 1U);
CRewriteTG* rfRewrite = new CRewriteTG(m_dmr5Name, (*it).m_fromSlot, (*it).m_fromTG, (*it).m_toSlot, (*it).m_toTG, (*it).m_range);
CRewriteTG* netRewrite = new CRewriteTG(m_dmr5Name, (*it).m_toSlot, (*it).m_toTG, (*it).m_fromSlot, (*it).m_fromTG, (*it).m_range);
m_dmr5RFRewrites.push_back(rfRewrite);
m_dmr5NetRewrites.push_back(netRewrite);
}
std::vector<CPCRewriteStruct> pcRewrites = m_conf.getDMRNetwork5PCRewrites();
for (std::vector<CPCRewriteStruct>::const_iterator it = pcRewrites.begin(); it != pcRewrites.end(); ++it) {
if ((*it).m_range == 1)
LogInfo(" Rewrite RF: %u:%u -> %u:%u", (*it).m_fromSlot, (*it).m_fromId, (*it).m_toSlot, (*it).m_toId);
else
LogInfo(" Rewrite RF: %u:%u-%u -> %u:%u-%u", (*it).m_fromSlot, (*it).m_fromId, (*it).m_fromId + (*it).m_range - 1U, (*it).m_toSlot, (*it).m_toId, (*it).m_toId + (*it).m_range - 1U);
CRewritePC* rewrite = new CRewritePC(m_dmr5Name, (*it).m_fromSlot, (*it).m_fromId, (*it).m_toSlot, (*it).m_toId, (*it).m_range);
m_dmr5RFRewrites.push_back(rewrite);
}
std::vector<CTypeRewriteStruct> typeRewrites = m_conf.getDMRNetwork5TypeRewrites();
for (std::vector<CTypeRewriteStruct>::const_iterator it = typeRewrites.begin(); it != typeRewrites.end(); ++it) {
LogInfo(" Rewrite RF: %u:TG%u -> %u:%u", (*it).m_fromSlot, (*it).m_fromTG, (*it).m_toSlot, (*it).m_toId);
CRewriteType* rewrite = new CRewriteType(m_dmr5Name, (*it).m_fromSlot, (*it).m_fromTG, (*it).m_toSlot, (*it).m_toId);
m_dmr5RFRewrites.push_back(rewrite);
}
std::vector<CSrcRewriteStruct> srcRewrites = m_conf.getDMRNetwork5SrcRewrites();
for (std::vector<CSrcRewriteStruct>::const_iterator it = srcRewrites.begin(); it != srcRewrites.end(); ++it) {
if ((*it).m_range == 1)
LogInfo(" Rewrite Net: %u:%u -> %u:TG%u", (*it).m_fromSlot, (*it).m_fromId, (*it).m_toSlot, (*it).m_toTG);
else
LogInfo(" Rewrite Net: %u:%u-%u -> %u:TG%u", (*it).m_fromSlot, (*it).m_fromId, (*it).m_fromId + (*it).m_range - 1U, (*it).m_toSlot, (*it).m_toTG);
CRewriteSrc* rewrite = new CRewriteSrc(m_dmr5Name, (*it).m_fromSlot, (*it).m_fromId, (*it).m_toSlot, (*it).m_toTG, (*it).m_range);
m_dmr5NetRewrites.push_back(rewrite);
}
std::vector<CIdRewriteStruct> idRewrites = m_conf.getDMRNetwork5IdRewrites();
for (std::vector<CIdRewriteStruct>::const_iterator it = idRewrites.begin(); it != idRewrites.end(); ++it) {
LogInfo(" Rewrite Id: %u <-> %u", (*it).m_rfId, (*it).m_netId);
CRewriteSrcId* rewriteSrcId = new CRewriteSrcId(m_dmr5Name, (*it).m_rfId, (*it).m_netId);
CRewriteDstId* rewriteDstId = new CRewriteDstId(m_dmr5Name, (*it).m_netId, (*it).m_rfId);
m_dmr5SrcRewrites.push_back(rewriteSrcId);
m_dmr5NetRewrites.push_back(rewriteDstId);
}
std::vector<unsigned int> tgPassAll = m_conf.getDMRNetwork5PassAllTG();
for (std::vector<unsigned int>::const_iterator it = tgPassAll.begin(); it != tgPassAll.end(); ++it) {
LogInfo(" Pass All TG: %u", *it);
CPassAllTG* rfPassAllTG = new CPassAllTG(m_dmr5Name, *it);
CPassAllTG* netPassAllTG = new CPassAllTG(m_dmr5Name, *it);
m_dmr5Passalls.push_back(rfPassAllTG);
m_dmr5NetRewrites.push_back(netPassAllTG);
}
std::vector<unsigned int> pcPassAll = m_conf.getDMRNetwork5PassAllPC();
for (std::vector<unsigned int>::const_iterator it = pcPassAll.begin(); it != pcPassAll.end(); ++it) {
LogInfo(" Pass All PC: %u", *it);
CPassAllPC* rfPassAllPC = new CPassAllPC(m_dmr5Name, *it);
CPassAllPC* netPassAllPC = new CPassAllPC(m_dmr5Name, *it);
m_dmr5Passalls.push_back(rfPassAllPC);
m_dmr5NetRewrites.push_back(netPassAllPC);
}
return true;
}
bool CDMRGateway::createXLXNetwork()
{
std::string fileName = m_conf.getXLXNetworkFile();