mirror of
https://github.com/g4klx/DMRGateway
synced 2025-12-21 13:35:40 +08:00
Add an XLX base so the control ids can be shifted.
This commit is contained in:
8
Conf.cpp
8
Conf.cpp
@@ -84,6 +84,7 @@ m_xlxNetworkLocal(0U),
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m_xlxNetworkPassword(),
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m_xlxNetworkPassword(),
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m_xlxNetworkSlot(2U),
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m_xlxNetworkSlot(2U),
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m_xlxNetworkTG(9U),
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m_xlxNetworkTG(9U),
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m_xlxNetworkBase(4000U),
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m_xlxNetworkOptions(),
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m_xlxNetworkOptions(),
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m_xlxNetworkDebug(false)
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m_xlxNetworkDebug(false)
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{
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{
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@@ -183,6 +184,8 @@ bool CConf::read()
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m_xlxNetworkSlot = (unsigned int)::atoi(value);
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m_xlxNetworkSlot = (unsigned int)::atoi(value);
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else if (::strcmp(key, "TG") == 0)
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else if (::strcmp(key, "TG") == 0)
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m_xlxNetworkTG = (unsigned int)::atoi(value);
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m_xlxNetworkTG = (unsigned int)::atoi(value);
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else if (::strcmp(key, "Base") == 0)
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m_xlxNetworkBase = (unsigned int)::atoi(value);
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else if (::strcmp(key, "Options") == 0)
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else if (::strcmp(key, "Options") == 0)
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m_xlxNetworkOptions = value;
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m_xlxNetworkOptions = value;
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else if (::strcmp(key, "Debug") == 0)
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else if (::strcmp(key, "Debug") == 0)
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@@ -452,6 +455,11 @@ unsigned int CConf::getXLXNetworkTG() const
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return m_xlxNetworkTG;
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return m_xlxNetworkTG;
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}
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}
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unsigned int CConf::getXLXNetworkBase() const
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{
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return m_xlxNetworkBase;
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}
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std::string CConf::getXLXNetworkPassword() const
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std::string CConf::getXLXNetworkPassword() const
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{
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{
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return m_xlxNetworkPassword;
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return m_xlxNetworkPassword;
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2
Conf.h
2
Conf.h
@@ -118,6 +118,7 @@ public:
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std::string getXLXNetworkPassword() const;
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std::string getXLXNetworkPassword() const;
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unsigned int getXLXNetworkSlot() const;
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unsigned int getXLXNetworkSlot() const;
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unsigned int getXLXNetworkTG() const;
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unsigned int getXLXNetworkTG() const;
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unsigned int getXLXNetworkBase() const;
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std::string getXLXNetworkOptions() const;
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std::string getXLXNetworkOptions() const;
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bool getXLXNetworkDebug() const;
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bool getXLXNetworkDebug() const;
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@@ -174,6 +175,7 @@ private:
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std::string m_xlxNetworkPassword;
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std::string m_xlxNetworkPassword;
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unsigned int m_xlxNetworkSlot;
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unsigned int m_xlxNetworkSlot;
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unsigned int m_xlxNetworkTG;
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unsigned int m_xlxNetworkTG;
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unsigned int m_xlxNetworkBase;
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std::string m_xlxNetworkOptions;
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std::string m_xlxNetworkOptions;
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bool m_xlxNetworkDebug;
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bool m_xlxNetworkDebug;
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};
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};
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@@ -125,6 +125,7 @@ m_xlxNetwork(NULL),
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m_reflector(4000U),
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m_reflector(4000U),
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m_xlxSlot(0U),
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m_xlxSlot(0U),
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m_xlxTG(0U),
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m_xlxTG(0U),
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m_xlxBase(0U),
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m_rptRewrite(NULL),
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m_rptRewrite(NULL),
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m_xlxRewrite(NULL),
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m_xlxRewrite(NULL),
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m_dmr1NetRewrites(),
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m_dmr1NetRewrites(),
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@@ -322,7 +323,10 @@ int CDMRGateway::run()
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m_xlxNetwork->write(data);
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m_xlxNetwork->write(data);
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status[slotNo] = DMRGWS_REFLECTOR;
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status[slotNo] = DMRGWS_REFLECTOR;
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timer[slotNo]->start();
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timer[slotNo]->start();
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} else if (flco == FLCO_USER_USER && slotNo == m_xlxSlot && dstId >= 4000U && dstId <= 4026U) {
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} else if (flco == FLCO_USER_USER && slotNo == m_xlxSlot && dstId >= m_xlxBase && dstId <= (m_xlxBase + 26U)) {
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dstId += 4000U;
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dstId -= m_xlxBase;
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if (dstId != m_reflector) {
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if (dstId != m_reflector) {
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if (dstId == 4000U)
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if (dstId == 4000U)
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LogMessage("Unlinking");
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LogMessage("Unlinking");
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@@ -804,9 +808,11 @@ bool CDMRGateway::createXLXNetwork()
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m_xlxSlot = m_conf.getXLXNetworkSlot();
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m_xlxSlot = m_conf.getXLXNetworkSlot();
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m_xlxTG = m_conf.getXLXNetworkTG();
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m_xlxTG = m_conf.getXLXNetworkTG();
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m_xlxBase = m_conf.getXLXNetworkBase();
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LogInfo(" Slot: %u", m_xlxSlot);
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LogInfo(" Slot: %u", m_xlxSlot);
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LogInfo(" TG: %u", m_xlxTG);
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LogInfo(" TG: %u", m_xlxTG);
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LogInfo(" Base: %u", m_xlxBase);
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m_rptRewrite = new CRewriteTG("XLX", XLX_SLOT, XLX_TG, m_xlxSlot, m_xlxTG, 1U);
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m_rptRewrite = new CRewriteTG("XLX", XLX_SLOT, XLX_TG, m_xlxSlot, m_xlxTG, 1U);
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m_xlxRewrite = new CRewriteTG("XLX", m_xlxSlot, m_xlxTG, XLX_SLOT, XLX_TG, 1U);
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m_xlxRewrite = new CRewriteTG("XLX", m_xlxSlot, m_xlxTG, XLX_SLOT, XLX_TG, 1U);
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@@ -45,6 +45,7 @@ private:
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unsigned int m_reflector;
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unsigned int m_reflector;
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unsigned int m_xlxSlot;
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unsigned int m_xlxSlot;
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unsigned int m_xlxTG;
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unsigned int m_xlxTG;
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unsigned int m_xlxBase;
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CRewriteTG* m_rptRewrite;
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CRewriteTG* m_rptRewrite;
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CRewriteTG* m_xlxRewrite;
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CRewriteTG* m_xlxRewrite;
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std::vector<IRewrite*> m_dmr1NetRewrites;
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std::vector<IRewrite*> m_dmr1NetRewrites;
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@@ -27,6 +27,7 @@ Port=62030
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# Options=
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# Options=
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Slot=1
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Slot=1
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TG=8
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TG=8
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Base=4000
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Password=passw0rd
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Password=passw0rd
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Debug=0
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Debug=0
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