MMDVM/DMRGateway
1
0
Fork 0
mirror of https://github.com/g4klx/DMRGateway synced 2025-12-20 21:25:37 +08:00
Code Issues Packages Projects Releases Wiki Activity

Fix reported bugs in the dynamic rewrite code.

Browse Source
This commit is contained in:
Jonathan Naylor
2020-04-05 13:43:57 +01:00
parent 0fef073c13
commit 8f39ca9ece
6 changed files with 41 additions and 39 deletions
Download Patch File Download Diff File Expand all files Collapse all files

20
Conf.cpp
View File

@@ -416,8 +416,8 @@ bool CConf::read()
CTGDynRewriteStruct rewrite;
rewrite.m_slot = ::atoi(p1);
rewrite.m_fromTG = ::atoi(p2);
rewrite.m_discTG = ::atoi(p3);
rewrite.m_statusTG = ::atoi(p4);
rewrite.m_discPC = ::atoi(p3);
rewrite.m_statusPC = ::atoi(p4);
rewrite.m_toTG = ::atoi(p5);
rewrite.m_range = ::atoi(p6);
m_dmrNetwork1TGDynRewrites.push_back(rewrite);
@@ -528,8 +528,8 @@ bool CConf::read()
CTGDynRewriteStruct rewrite;
rewrite.m_slot = ::atoi(p1);
rewrite.m_fromTG = ::atoi(p2);
rewrite.m_discTG = ::atoi(p3);
rewrite.m_statusTG = ::atoi(p4);
rewrite.m_discPC = ::atoi(p3);
rewrite.m_statusPC = ::atoi(p4);
rewrite.m_toTG = ::atoi(p5);
rewrite.m_range = ::atoi(p6);
m_dmrNetwork2TGDynRewrites.push_back(rewrite);
@@ -640,8 +640,8 @@ bool CConf::read()
CTGDynRewriteStruct rewrite;
rewrite.m_slot = ::atoi(p1);
rewrite.m_fromTG = ::atoi(p2);
rewrite.m_discTG = ::atoi(p3);
rewrite.m_statusTG = ::atoi(p4);
rewrite.m_discPC = ::atoi(p3);
rewrite.m_statusPC = ::atoi(p4);
rewrite.m_toTG = ::atoi(p5);
rewrite.m_range = ::atoi(p6);
m_dmrNetwork3TGDynRewrites.push_back(rewrite);
@@ -752,8 +752,8 @@ bool CConf::read()
CTGDynRewriteStruct rewrite;
rewrite.m_slot = ::atoi(p1);
rewrite.m_fromTG = ::atoi(p2);
rewrite.m_discTG = ::atoi(p3);
rewrite.m_statusTG = ::atoi(p4);
rewrite.m_discPC = ::atoi(p3);
rewrite.m_statusPC = ::atoi(p4);
rewrite.m_toTG = ::atoi(p5);
rewrite.m_range = ::atoi(p6);
m_dmrNetwork4TGDynRewrites.push_back(rewrite);
@@ -864,8 +864,8 @@ bool CConf::read()
CTGDynRewriteStruct rewrite;
rewrite.m_slot = ::atoi(p1);
rewrite.m_fromTG = ::atoi(p2);
rewrite.m_discTG = ::atoi(p3);
rewrite.m_statusTG = ::atoi(p4);
rewrite.m_discPC = ::atoi(p3);
rewrite.m_statusPC = ::atoi(p4);
rewrite.m_toTG = ::atoi(p5);
rewrite.m_range = ::atoi(p6);
m_dmrNetwork5TGDynRewrites.push_back(rewrite);

4
Conf.h
View File

@@ -56,8 +56,8 @@ struct CSrcRewriteStruct {
struct CTGDynRewriteStruct {
unsigned int m_slot;
unsigned int m_fromTG;
unsigned int m_discTG;
unsigned int m_statusTG;
unsigned int m_discPC;
unsigned int m_statusPC;
unsigned int m_toTG;
unsigned int m_range;
};

20
DMRGateway.cpp
View File

@@ -1358,10 +1358,10 @@ bool CDMRGateway::createDMRNetwork1(CDynVoice* voice)
std::vector<CTGDynRewriteStruct> dynRewrites = m_conf.getDMRNetwork1TGDynRewrites();
for (std::vector<CTGDynRewriteStruct>::const_iterator it = dynRewrites.begin(); it != dynRewrites.end(); ++it) {
LogInfo(" Dyn Rewrite: %u:TG%u-%u:TG%u <-> %u:TG%u (disc %u:TG%u) (status %u:TG%u)", (*it).m_slot, (*it).m_fromTG, (*it).m_slot, (*it).m_fromTG + (*it).m_range - 1U, (*it).m_slot, (*it).m_toTG, (*it).m_slot, (*it).m_discTG, (*it).m_slot, (*it).m_statusTG);
LogInfo(" Dyn Rewrite: %u:TG%u-%u:TG%u <-> %u:TG%u (disc %u:%u) (status %u:%u)", (*it).m_slot, (*it).m_fromTG, (*it).m_slot, (*it).m_fromTG + (*it).m_range - 1U, (*it).m_slot, (*it).m_toTG, (*it).m_slot, (*it).m_discPC, (*it).m_slot, (*it).m_statusPC);
CRewriteDynTGNet* netRewriteDynTG = new CRewriteDynTGNet(m_dmr1Name, (*it).m_slot, (*it).m_toTG);
CRewriteDynTGRF* rfRewriteDynTG = new CRewriteDynTGRF(m_dmr1Name, (*it).m_slot, (*it).m_fromTG, (*it).m_toTG, (*it).m_discTG, (*it).m_statusTG, (*it).m_range, netRewriteDynTG, voice);
CRewriteDynTGRF* rfRewriteDynTG = new CRewriteDynTGRF(m_dmr1Name, (*it).m_slot, (*it).m_fromTG, (*it).m_toTG, (*it).m_discPC, (*it).m_statusPC, (*it).m_range, netRewriteDynTG, voice);
m_dmr1RFRewrites.push_back(rfRewriteDynTG);
m_dmr1NetRewrites.push_back(netRewriteDynTG);
@@ -1507,10 +1507,10 @@ bool CDMRGateway::createDMRNetwork2(CDynVoice* voice)
std::vector<CTGDynRewriteStruct> dynRewrites = m_conf.getDMRNetwork2TGDynRewrites();
for (std::vector<CTGDynRewriteStruct>::const_iterator it = dynRewrites.begin(); it != dynRewrites.end(); ++it) {
LogInfo(" Dyn Rewrite: %u:TG%u-%u:TG%u <-> %u:TG%u (disc %u:TG%u) (status %u:TG%u)", (*it).m_slot, (*it).m_fromTG, (*it).m_slot, (*it).m_fromTG + (*it).m_range - 1U, (*it).m_slot, (*it).m_toTG, (*it).m_slot, (*it).m_discTG, (*it).m_slot, (*it).m_statusTG);
LogInfo(" Dyn Rewrite: %u:TG%u-%u:TG%u <-> %u:TG%u (disc %u:%u) (status %u:%u)", (*it).m_slot, (*it).m_fromTG, (*it).m_slot, (*it).m_fromTG + (*it).m_range - 1U, (*it).m_slot, (*it).m_toTG, (*it).m_slot, (*it).m_discPC, (*it).m_slot, (*it).m_statusPC);
CRewriteDynTGNet* netRewriteDynTG = new CRewriteDynTGNet(m_dmr2Name, (*it).m_slot, (*it).m_toTG);
CRewriteDynTGRF* rfRewriteDynTG = new CRewriteDynTGRF(m_dmr2Name, (*it).m_slot, (*it).m_fromTG, (*it).m_toTG, (*it).m_discTG, (*it).m_statusTG, (*it).m_range, netRewriteDynTG, voice);
CRewriteDynTGRF* rfRewriteDynTG = new CRewriteDynTGRF(m_dmr2Name, (*it).m_slot, (*it).m_fromTG, (*it).m_toTG, (*it).m_discPC, (*it).m_statusPC, (*it).m_range, netRewriteDynTG, voice);
m_dmr2RFRewrites.push_back(rfRewriteDynTG);
m_dmr2NetRewrites.push_back(netRewriteDynTG);
@@ -1656,10 +1656,10 @@ bool CDMRGateway::createDMRNetwork3(CDynVoice* voice)
std::vector<CTGDynRewriteStruct> dynRewrites = m_conf.getDMRNetwork3TGDynRewrites();
for (std::vector<CTGDynRewriteStruct>::const_iterator it = dynRewrites.begin(); it != dynRewrites.end(); ++it) {
LogInfo(" Dyn Rewrite: %u:TG%u-%u:TG%u <-> %u:TG%u (disc %u:TG%u) (status %u:TG%u)", (*it).m_slot, (*it).m_fromTG, (*it).m_slot, (*it).m_fromTG + (*it).m_range - 1U, (*it).m_slot, (*it).m_toTG, (*it).m_slot, (*it).m_discTG, (*it).m_slot, (*it).m_statusTG);
LogInfo(" Dyn Rewrite: %u:TG%u-%u:TG%u <-> %u:TG%u (disc %u:%u) (status %u:%u)", (*it).m_slot, (*it).m_fromTG, (*it).m_slot, (*it).m_fromTG + (*it).m_range - 1U, (*it).m_slot, (*it).m_toTG, (*it).m_slot, (*it).m_discPC, (*it).m_slot, (*it).m_statusPC);
CRewriteDynTGNet* netRewriteDynTG = new CRewriteDynTGNet(m_dmr3Name, (*it).m_slot, (*it).m_toTG);
CRewriteDynTGRF* rfRewriteDynTG = new CRewriteDynTGRF(m_dmr3Name, (*it).m_slot, (*it).m_fromTG, (*it).m_toTG, (*it).m_discTG, (*it).m_statusTG, (*it).m_range, netRewriteDynTG, voice);
CRewriteDynTGRF* rfRewriteDynTG = new CRewriteDynTGRF(m_dmr3Name, (*it).m_slot, (*it).m_fromTG, (*it).m_toTG, (*it).m_discPC, (*it).m_statusPC, (*it).m_range, netRewriteDynTG, voice);
m_dmr3RFRewrites.push_back(rfRewriteDynTG);
m_dmr3NetRewrites.push_back(netRewriteDynTG);
@@ -1805,10 +1805,10 @@ bool CDMRGateway::createDMRNetwork4(CDynVoice* voice)
std::vector<CTGDynRewriteStruct> dynRewrites = m_conf.getDMRNetwork4TGDynRewrites();
for (std::vector<CTGDynRewriteStruct>::const_iterator it = dynRewrites.begin(); it != dynRewrites.end(); ++it) {
LogInfo(" Dyn Rewrite: %u:TG%u-%u:TG%u <-> %u:TG%u (disc %u:TG%u) (status %u:TG%u)", (*it).m_slot, (*it).m_fromTG, (*it).m_slot, (*it).m_fromTG + (*it).m_range - 1U, (*it).m_slot, (*it).m_toTG, (*it).m_slot, (*it).m_discTG, (*it).m_slot, (*it).m_statusTG);
LogInfo(" Dyn Rewrite: %u:TG%u-%u:TG%u <-> %u:TG%u (disc %u:%u) (status %u:%u)", (*it).m_slot, (*it).m_fromTG, (*it).m_slot, (*it).m_fromTG + (*it).m_range - 1U, (*it).m_slot, (*it).m_toTG, (*it).m_slot, (*it).m_discPC, (*it).m_slot, (*it).m_statusPC);
CRewriteDynTGNet* netRewriteDynTG = new CRewriteDynTGNet(m_dmr4Name, (*it).m_slot, (*it).m_toTG);
CRewriteDynTGRF* rfRewriteDynTG = new CRewriteDynTGRF(m_dmr4Name, (*it).m_slot, (*it).m_fromTG, (*it).m_toTG, (*it).m_discTG, (*it).m_statusTG, (*it).m_range, netRewriteDynTG, voice);
CRewriteDynTGRF* rfRewriteDynTG = new CRewriteDynTGRF(m_dmr4Name, (*it).m_slot, (*it).m_fromTG, (*it).m_toTG, (*it).m_discPC, (*it).m_statusPC, (*it).m_range, netRewriteDynTG, voice);
m_dmr4RFRewrites.push_back(rfRewriteDynTG);
m_dmr4NetRewrites.push_back(netRewriteDynTG);
@@ -1954,10 +1954,10 @@ bool CDMRGateway::createDMRNetwork5(CDynVoice* voice)
std::vector<CTGDynRewriteStruct> dynRewrites = m_conf.getDMRNetwork5TGDynRewrites();
for (std::vector<CTGDynRewriteStruct>::const_iterator it = dynRewrites.begin(); it != dynRewrites.end(); ++it) {
LogInfo(" Dyn Rewrite: %u:TG%u-%u:TG%u <-> %u:TG%u (disc %u:TG%u) (status %u:TG%u)", (*it).m_slot, (*it).m_fromTG, (*it).m_slot, (*it).m_fromTG + (*it).m_range - 1U, (*it).m_slot, (*it).m_toTG, (*it).m_slot, (*it).m_discTG, (*it).m_slot, (*it).m_statusTG);
LogInfo(" Dyn Rewrite: %u:TG%u-%u:TG%u <-> %u:TG%u (disc %u:%u) (status %u:%u)", (*it).m_slot, (*it).m_fromTG, (*it).m_slot, (*it).m_fromTG + (*it).m_range - 1U, (*it).m_slot, (*it).m_toTG, (*it).m_slot, (*it).m_discPC, (*it).m_slot, (*it).m_statusPC);
CRewriteDynTGNet* netRewriteDynTG = new CRewriteDynTGNet(m_dmr5Name, (*it).m_slot, (*it).m_toTG);
CRewriteDynTGRF* rfRewriteDynTG = new CRewriteDynTGRF(m_dmr5Name, (*it).m_slot, (*it).m_fromTG, (*it).m_toTG, (*it).m_discTG, (*it).m_statusTG, (*it).m_range, netRewriteDynTG, voice);
CRewriteDynTGRF* rfRewriteDynTG = new CRewriteDynTGRF(m_dmr5Name, (*it).m_slot, (*it).m_fromTG, (*it).m_toTG, (*it).m_discPC, (*it).m_statusPC, (*it).m_range, netRewriteDynTG, voice);
m_dmr5RFRewrites.push_back(rfRewriteDynTG);
m_dmr5NetRewrites.push_back(netRewriteDynTG);

28
RewriteDynTGRF.cpp
View File

@@ -24,15 +24,15 @@
#include <cstdio>
#include <cassert>
CRewriteDynTGRF::CRewriteDynTGRF(const std::string& name, unsigned int slot, unsigned int fromTG, unsigned int toTG, unsigned int discTG, unsigned int statusTG, unsigned int range, CRewriteDynTGNet* rewriteNet, CDynVoice* voice) :
CRewriteDynTGRF::CRewriteDynTGRF(const std::string& name, unsigned int slot, unsigned int fromTG, unsigned int toTG, unsigned int discPC, unsigned int statusPC, unsigned int range, CRewriteDynTGNet* rewriteNet, CDynVoice* voice) :
CRewrite(),
m_name(name),
m_slot(slot),
m_fromTGStart(fromTG),
m_fromTGEnd(fromTG + range - 1U),
m_toTG(toTG),
m_discTG(discTG),
m_statusTG(statusTG),
m_discPC(discPC),
m_statusPC(statusPC),
m_rewriteNet(rewriteNet),
m_voice(voice),
m_currentTG(0U)
@@ -66,9 +66,11 @@ PROCESS_RESULT CRewriteDynTGRF::process(CDMRData& data, bool trace)
return RESULT_MATCHED;
}
if (flco == FLCO_GROUP && slotNo == m_slot && dstId == m_discTG && m_currentTG != 0U) {
if (flco == FLCO_USER_USER && slotNo == m_slot && dstId == m_discPC && m_currentTG != 0U) {
if (trace)
LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=TG%u: matched", m_name.c_str(), m_slot, m_discTG);
LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=%u: matched", m_name.c_str(), m_slot, m_discPC);
data.setFLCO(FLCO_GROUP);
if (type == DT_TERMINATOR_WITH_LC) {
m_rewriteNet->setCurrentTG(0U);
@@ -80,12 +82,12 @@ PROCESS_RESULT CRewriteDynTGRF::process(CDMRData& data, bool trace)
return RESULT_MATCHED;
}
if (slotNo == m_slot && dstId >= m_fromTGStart && dstId <= m_fromTGEnd) {
if (flco == FLCO_USER_USER && slotNo == m_slot && dstId >= m_fromTGStart && dstId <= m_fromTGEnd) {
if (trace) {
if (m_fromTGStart == m_fromTGEnd)
LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=TG%u: matched", m_name.c_str(), m_slot, m_fromTGStart);
LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=%u: matched", m_name.c_str(), m_slot, m_fromTGStart);
else
LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=TG%u-TG%u: matched", m_name.c_str(), m_slot, m_fromTGStart, m_fromTGEnd);
LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=%u-%u: matched", m_name.c_str(), m_slot, m_fromTGStart, m_fromTGEnd);
}
data.setFLCO(FLCO_GROUP);
@@ -100,15 +102,15 @@ PROCESS_RESULT CRewriteDynTGRF::process(CDMRData& data, bool trace)
return RESULT_MATCHED;
}
if (flco == FLCO_GROUP && slotNo == m_slot && dstId == m_statusTG) {
if (flco == FLCO_USER_USER && slotNo == m_slot && dstId == m_statusPC) {
if (trace)
LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=TG%u: matched", m_name.c_str(), m_slot, m_statusTG);
LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=%u: matched", m_name.c_str(), m_slot, m_statusPC);
if (type == DT_TERMINATOR_WITH_LC && m_voice != NULL) {
if (m_currentTG == 0U)
m_voice->unlinked();
else
m_voice->linkedTo(dstId);
m_voice->linkedTo(m_currentTG);
}
return RESULT_IGNORED;
@@ -116,9 +118,9 @@ PROCESS_RESULT CRewriteDynTGRF::process(CDMRData& data, bool trace)
if (trace) {
if (m_fromTGStart == m_fromTGEnd)
LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=TG%u or Dst=TG%u or Dst=TG%u or Dst=TG%u: not matched", m_name.c_str(), m_slot, m_fromTGStart, m_toTG, m_discTG, m_statusTG);
LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=%u or Dst=TG%u or Dst=%u or Dst=%u: not matched", m_name.c_str(), m_slot, m_fromTGStart, m_toTG, m_discPC, m_statusPC);
else
LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=TG%u-TG%u or Dst=TG%u or Dst=TG%u or Dst=TG%u: not matched", m_name.c_str(), m_slot, m_fromTGStart, m_fromTGEnd, m_toTG, m_discTG, m_statusTG);
LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=%u-%u or Dst=TG%u or Dst=%u or Dst=%u: not matched", m_name.c_str(), m_slot, m_fromTGStart, m_fromTGEnd, m_toTG, m_discPC, m_statusPC);
}
return RESULT_UNMATCHED;

6
RewriteDynTGRF.h
View File

@@ -29,7 +29,7 @@
class CRewriteDynTGRF : public CRewrite {
public:
CRewriteDynTGRF(const std::string& name, unsigned int slot, unsigned int fromTG, unsigned int toTG, unsigned int discTG, unsigned int statusTG, unsigned int range, CRewriteDynTGNet* rewriteNet, CDynVoice* voice);
CRewriteDynTGRF(const std::string& name, unsigned int slot, unsigned int fromTG, unsigned int toTG, unsigned int discPC, unsigned int statusPC, unsigned int range, CRewriteDynTGNet* rewriteNet, CDynVoice* voice);
virtual ~CRewriteDynTGRF();
virtual PROCESS_RESULT process(CDMRData& data, bool trace);
@@ -40,8 +40,8 @@ private:
unsigned int m_fromTGStart;
unsigned int m_fromTGEnd;
unsigned int m_toTG;
unsigned int m_discTG;
unsigned int m_statusTG;
unsigned int m_discPC;
unsigned int m_statusPC;
CRewriteDynTGNet* m_rewriteNet;
CDynVoice* m_voice;
unsigned int m_currentTG;

2
Version.h
View File

@@ -19,6 +19,6 @@
#if !defined(VERSION_H)
#define VERSION_H
const char* VERSION = "20200403";
const char* VERSION = "20200405";
#endif