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Fix the order of processing the dynamic rewrite rules.

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Jonathan Naylor
2020-04-08 17:28:43 +01:00
parent 6b470c92a7
commit dafac8c025
4 changed files with 53 additions and 45 deletions
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10
DMRGateway.cpp
View File

@@ -1352,7 +1352,7 @@ bool CDMRGateway::createDMRNetwork1()
std::vector<CTGDynRewriteStruct> dynRewrites = m_conf.getDMRNetwork1TGDynRewrites(); std::vector<CTGDynRewriteStruct> dynRewrites = m_conf.getDMRNetwork1TGDynRewrites();
for (std::vector<CTGDynRewriteStruct>::const_iterator it = dynRewrites.begin(); it != dynRewrites.end(); ++it) { for (std::vector<CTGDynRewriteStruct>::const_iterator it = dynRewrites.begin(); it != dynRewrites.end(); ++it) {
LogInfo(" Dyn Rewrite: %u:TG%u-%u:TG%u <-> %u:TG%u (disc %u:%u) (status %u:%u)", (*it).m_slot, (*it).m_fromTG, (*it).m_slot, (*it).m_fromTG + (*it).m_range - 1U, (*it).m_slot, (*it).m_toTG, (*it).m_slot, (*it).m_discPC, (*it).m_slot, (*it).m_statusPC); LogInfo(" Dyn Rewrite: %u:TG%u-%u:TG%u <-> %u:TG%u (disc %u:%u) (status %u:%u) (%u exclusions)", (*it).m_slot, (*it).m_fromTG, (*it).m_slot, (*it).m_fromTG + (*it).m_range - 1U, (*it).m_slot, (*it).m_toTG, (*it).m_slot, (*it).m_discPC, (*it).m_slot, (*it).m_statusPC, (*it).m_exclTGs.size());
CDynVoice* voice = NULL; CDynVoice* voice = NULL;
if (m_conf.getVoiceEnabled()) { if (m_conf.getVoiceEnabled()) {
@@ -1516,7 +1516,7 @@ bool CDMRGateway::createDMRNetwork2()
std::vector<CTGDynRewriteStruct> dynRewrites = m_conf.getDMRNetwork2TGDynRewrites(); std::vector<CTGDynRewriteStruct> dynRewrites = m_conf.getDMRNetwork2TGDynRewrites();
for (std::vector<CTGDynRewriteStruct>::const_iterator it = dynRewrites.begin(); it != dynRewrites.end(); ++it) { for (std::vector<CTGDynRewriteStruct>::const_iterator it = dynRewrites.begin(); it != dynRewrites.end(); ++it) {
LogInfo(" Dyn Rewrite: %u:TG%u-%u:TG%u <-> %u:TG%u (disc %u:%u) (status %u:%u)", (*it).m_slot, (*it).m_fromTG, (*it).m_slot, (*it).m_fromTG + (*it).m_range - 1U, (*it).m_slot, (*it).m_toTG, (*it).m_slot, (*it).m_discPC, (*it).m_slot, (*it).m_statusPC); LogInfo(" Dyn Rewrite: %u:TG%u-%u:TG%u <-> %u:TG%u (disc %u:%u) (status %u:%u) (%u exclusions)", (*it).m_slot, (*it).m_fromTG, (*it).m_slot, (*it).m_fromTG + (*it).m_range - 1U, (*it).m_slot, (*it).m_toTG, (*it).m_slot, (*it).m_discPC, (*it).m_slot, (*it).m_statusPC, (*it).m_exclTGs.size());
CDynVoice* voice = NULL; CDynVoice* voice = NULL;
if (m_conf.getVoiceEnabled()) { if (m_conf.getVoiceEnabled()) {
@@ -1680,7 +1680,7 @@ bool CDMRGateway::createDMRNetwork3()
std::vector<CTGDynRewriteStruct> dynRewrites = m_conf.getDMRNetwork3TGDynRewrites(); std::vector<CTGDynRewriteStruct> dynRewrites = m_conf.getDMRNetwork3TGDynRewrites();
for (std::vector<CTGDynRewriteStruct>::const_iterator it = dynRewrites.begin(); it != dynRewrites.end(); ++it) { for (std::vector<CTGDynRewriteStruct>::const_iterator it = dynRewrites.begin(); it != dynRewrites.end(); ++it) {
LogInfo(" Dyn Rewrite: %u:TG%u-%u:TG%u <-> %u:TG%u (disc %u:%u) (status %u:%u)", (*it).m_slot, (*it).m_fromTG, (*it).m_slot, (*it).m_fromTG + (*it).m_range - 1U, (*it).m_slot, (*it).m_toTG, (*it).m_slot, (*it).m_discPC, (*it).m_slot, (*it).m_statusPC); LogInfo(" Dyn Rewrite: %u:TG%u-%u:TG%u <-> %u:TG%u (disc %u:%u) (status %u:%u) (%u exclusions)", (*it).m_slot, (*it).m_fromTG, (*it).m_slot, (*it).m_fromTG + (*it).m_range - 1U, (*it).m_slot, (*it).m_toTG, (*it).m_slot, (*it).m_discPC, (*it).m_slot, (*it).m_statusPC, (*it).m_exclTGs.size());
CDynVoice* voice = NULL; CDynVoice* voice = NULL;
if (m_conf.getVoiceEnabled()) { if (m_conf.getVoiceEnabled()) {
@@ -1844,7 +1844,7 @@ bool CDMRGateway::createDMRNetwork4()
std::vector<CTGDynRewriteStruct> dynRewrites = m_conf.getDMRNetwork4TGDynRewrites(); std::vector<CTGDynRewriteStruct> dynRewrites = m_conf.getDMRNetwork4TGDynRewrites();
for (std::vector<CTGDynRewriteStruct>::const_iterator it = dynRewrites.begin(); it != dynRewrites.end(); ++it) { for (std::vector<CTGDynRewriteStruct>::const_iterator it = dynRewrites.begin(); it != dynRewrites.end(); ++it) {
LogInfo(" Dyn Rewrite: %u:TG%u-%u:TG%u <-> %u:TG%u (disc %u:%u) (status %u:%u)", (*it).m_slot, (*it).m_fromTG, (*it).m_slot, (*it).m_fromTG + (*it).m_range - 1U, (*it).m_slot, (*it).m_toTG, (*it).m_slot, (*it).m_discPC, (*it).m_slot, (*it).m_statusPC); LogInfo(" Dyn Rewrite: %u:TG%u-%u:TG%u <-> %u:TG%u (disc %u:%u) (status %u:%u) (%u exclusions)", (*it).m_slot, (*it).m_fromTG, (*it).m_slot, (*it).m_fromTG + (*it).m_range - 1U, (*it).m_slot, (*it).m_toTG, (*it).m_slot, (*it).m_discPC, (*it).m_slot, (*it).m_statusPC, (*it).m_exclTGs.size());
CDynVoice* voice = NULL; CDynVoice* voice = NULL;
if (m_conf.getVoiceEnabled()) { if (m_conf.getVoiceEnabled()) {
@@ -2008,7 +2008,7 @@ bool CDMRGateway::createDMRNetwork5()
std::vector<CTGDynRewriteStruct> dynRewrites = m_conf.getDMRNetwork5TGDynRewrites(); std::vector<CTGDynRewriteStruct> dynRewrites = m_conf.getDMRNetwork5TGDynRewrites();
for (std::vector<CTGDynRewriteStruct>::const_iterator it = dynRewrites.begin(); it != dynRewrites.end(); ++it) { for (std::vector<CTGDynRewriteStruct>::const_iterator it = dynRewrites.begin(); it != dynRewrites.end(); ++it) {
LogInfo(" Dyn Rewrite: %u:TG%u-%u:TG%u <-> %u:TG%u (disc %u:%u) (status %u:%u)", (*it).m_slot, (*it).m_fromTG, (*it).m_slot, (*it).m_fromTG + (*it).m_range - 1U, (*it).m_slot, (*it).m_toTG, (*it).m_slot, (*it).m_discPC, (*it).m_slot, (*it).m_statusPC); LogInfo(" Dyn Rewrite: %u:TG%u-%u:TG%u <-> %u:TG%u (disc %u:%u) (status %u:%u) (%u exclusions)", (*it).m_slot, (*it).m_fromTG, (*it).m_slot, (*it).m_fromTG + (*it).m_range - 1U, (*it).m_slot, (*it).m_toTG, (*it).m_slot, (*it).m_discPC, (*it).m_slot, (*it).m_statusPC, (*it).m_exclTGs.size());
CDynVoice* voice = NULL; CDynVoice* voice = NULL;
if (m_conf.getVoiceEnabled()) { if (m_conf.getVoiceEnabled()) {

2
DMRGateway.ini
View File

@@ -71,7 +71,7 @@ SrcRewrite=1,9990,1,9990,1
# Reflector status returns # Reflector status returns
SrcRewrite=2,4000,2,9,1001 SrcRewrite=2,4000,2,9,1001
# Dynamic rewriting of slot 2 TGs 90-999999 to TG9 to emulate reflector behaviour # Dynamic rewriting of slot 2 TGs 90-999999 to TG9 to emulate reflector behaviour
TGDynRewrite=2,90,4000,5000,9,999909,4000,5000,9900 TGDynRewrite=2,90,4000,5000,9,999910,9900
# Pass all of the other private traffic on slot 1 and slot 2 # Pass all of the other private traffic on slot 1 and slot 2
PassAllPC=1 PassAllPC=1
PassAllPC=2 PassAllPC=2

62
RewriteDynTGRF.cpp
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@@ -54,28 +54,26 @@ PROCESS_RESULT CRewriteDynTGRF::process(CDMRData& data, bool trace)
unsigned int slotNo = data.getSlotNo(); unsigned int slotNo = data.getSlotNo();
unsigned char type = data.getDataType(); unsigned char type = data.getDataType();
if (flco == FLCO_GROUP && slotNo == m_slot && dstId == m_toTG && m_currentTG != 0U) { if (flco == FLCO_GROUP && slotNo == m_slot && dstId == m_toTG) {
if (trace)
LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=TG%u: matched", m_name.c_str(), m_slot, m_toTG);
if (m_currentTG != 0U) {
data.setDstId(m_currentTG); data.setDstId(m_currentTG);
processMessage(data); processMessage(data);
if (trace)
LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=TG%u: matched", m_name.c_str(), m_slot, m_toTG);
return RESULT_MATCHED; return RESULT_MATCHED;
} else {
return RESULT_IGNORED;
}
} }
if (flco == FLCO_GROUP && std::find(m_exclTGs.cbegin(), m_exclTGs.cend(), dstId) != m_exclTGs.cend()) { if (slotNo == m_slot && dstId == m_discPC) {
if (trace)
LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=TG%u: not matched", m_name.c_str(), m_slot, dstId);
return RESULT_UNMATCHED;
}
if (flco == FLCO_USER_USER && slotNo == m_slot && dstId == m_discPC && m_currentTG != 0U) {
if (trace) if (trace)
LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=%u: matched", m_name.c_str(), m_slot, m_discPC); LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=%u: matched", m_name.c_str(), m_slot, m_discPC);
if (m_currentTG != 0U) {
data.setFLCO(FLCO_GROUP); data.setFLCO(FLCO_GROUP);
processMessage(data); processMessage(data);
@@ -88,9 +86,33 @@ PROCESS_RESULT CRewriteDynTGRF::process(CDMRData& data, bool trace)
} }
return RESULT_MATCHED; return RESULT_MATCHED;
} else {
return RESULT_IGNORED;
}
} }
if (flco == FLCO_USER_USER && slotNo == m_slot && dstId >= m_fromTGStart && dstId <= m_fromTGEnd) { if (slotNo == m_slot && dstId == m_statusPC) {
if (trace)
LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=%u: matched", m_name.c_str(), m_slot, m_statusPC);
if (type == DT_TERMINATOR_WITH_LC && m_voice != NULL) {
if (m_currentTG == 0U)
m_voice->unlinked();
else
m_voice->linkedTo(m_currentTG);
}
return RESULT_IGNORED;
}
if (std::find(m_exclTGs.cbegin(), m_exclTGs.cend(), dstId) != m_exclTGs.cend()) {
if (trace)
LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=%u: matched", m_name.c_str(), m_slot, dstId);
return RESULT_IGNORED;
}
if (slotNo == m_slot && dstId >= m_fromTGStart && dstId <= m_fromTGEnd) {
if (trace) { if (trace) {
if (m_fromTGStart == m_fromTGEnd) if (m_fromTGStart == m_fromTGEnd)
LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=%u: matched", m_name.c_str(), m_slot, m_fromTGStart); LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=%u: matched", m_name.c_str(), m_slot, m_fromTGStart);
@@ -112,20 +134,6 @@ PROCESS_RESULT CRewriteDynTGRF::process(CDMRData& data, bool trace)
return RESULT_MATCHED; return RESULT_MATCHED;
} }
if (flco == FLCO_USER_USER && slotNo == m_slot && dstId == m_statusPC) {
if (trace)
LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=%u: matched", m_name.c_str(), m_slot, m_statusPC);
if (type == DT_TERMINATOR_WITH_LC && m_voice != NULL) {
if (m_currentTG == 0U)
m_voice->unlinked();
else
m_voice->linkedTo(m_currentTG);
}
return RESULT_IGNORED;
}
if (trace) { if (trace) {
if (m_fromTGStart == m_fromTGEnd) if (m_fromTGStart == m_fromTGEnd)
LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=%u or Dst=TG%u or Dst=%u or Dst=%u: not matched", m_name.c_str(), m_slot, m_fromTGStart, m_toTG, m_discPC, m_statusPC); LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=%u or Dst=TG%u or Dst=%u or Dst=%u: not matched", m_name.c_str(), m_slot, m_fromTGStart, m_toTG, m_discPC, m_statusPC);

2
Version.h
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@@ -19,6 +19,6 @@
#if !defined(VERSION_H) #if !defined(VERSION_H)
#define VERSION_H #define VERSION_H
const char* VERSION = "20200407"; const char* VERSION = "20200408";
#endif #endif