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Clean up TG rewrite code.

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This commit is contained in:
Jonathan Naylor
2016-09-17 16:29:43 +01:00
parent cb8cc99efd
commit 730d14fde2
7 changed files with 129 additions and 137 deletions
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141
DMRAccessControl.cpp
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@@ -20,51 +20,51 @@
#include <vector>
#include <ctime>
std::vector<unsigned int> DMRAccessControl::m_dstBlackListSlot1RF;
std::vector<unsigned int> DMRAccessControl::m_dstBlackListSlot2RF;
std::vector<unsigned int> DMRAccessControl::m_dstWhiteListSlot1RF;
std::vector<unsigned int> DMRAccessControl::m_dstWhiteListSlot2RF;
std::vector<unsigned int> CDMRAccessControl::m_dstBlackListSlot1RF;
std::vector<unsigned int> CDMRAccessControl::m_dstBlackListSlot2RF;
std::vector<unsigned int> CDMRAccessControl::m_dstWhiteListSlot1RF;
std::vector<unsigned int> CDMRAccessControl::m_dstWhiteListSlot2RF;
std::vector<unsigned int> DMRAccessControl::m_dstBlackListSlot1NET;
std::vector<unsigned int> DMRAccessControl::m_dstBlackListSlot2NET;
std::vector<unsigned int> DMRAccessControl::m_dstWhiteListSlot1NET;
std::vector<unsigned int> DMRAccessControl::m_dstWhiteListSlot2NET;
std::vector<unsigned int> CDMRAccessControl::m_dstBlackListSlot1NET;
std::vector<unsigned int> CDMRAccessControl::m_dstBlackListSlot2NET;
std::vector<unsigned int> CDMRAccessControl::m_dstWhiteListSlot1NET;
std::vector<unsigned int> CDMRAccessControl::m_dstWhiteListSlot2NET;
std::vector<unsigned int> DMRAccessControl::m_SrcIdBlacklist;
std::vector<unsigned int> CDMRAccessControl::m_srcIdBlacklist;
std::vector<unsigned int> DMRAccessControl::m_prefixes;
std::vector<unsigned int> CDMRAccessControl::m_prefixes;
bool DMRAccessControl::m_selfOnly = false;
bool CDMRAccessControl::m_selfOnly = false;
unsigned int DMRAccessControl::m_id = 0U;
unsigned int CDMRAccessControl::m_id = 0U;
unsigned int DMRAccessControl::m_dstRewriteID = 0U;
unsigned int DMRAccessControl::m_SrcID = 0U;
unsigned int CDMRAccessControl::m_dstRewriteID = 0U;
unsigned int CDMRAccessControl::m_srcID = 0U;
std::time_t DMRAccessControl::m_time;
std::time_t CDMRAccessControl::m_time;
unsigned int DMRAccessControl::m_callHang;
unsigned int CDMRAccessControl::m_callHang = 0U;
bool DMRAccessControl::m_TGRewriteSlot1;
bool DMRAccessControl::m_TGRewriteSlot2;
bool CDMRAccessControl::m_tgRewriteSlot1 = false;
bool CDMRAccessControl::m_tgRewriteSlot2 = false;
void DMRAccessControl::init(const std::vector<unsigned int>& DstIdBlacklistSlot1RF, const std::vector<unsigned int>& DstIdWhitelistSlot1RF, const std::vector<unsigned int>& DstIdBlacklistSlot2RF, const std::vector<unsigned int>& DstIdWhitelistSlot2RF, const std::vector<unsigned int>& DstIdBlacklistSlot1NET, const std::vector<unsigned int>& DstIdWhitelistSlot1NET, const std::vector<unsigned int>& DstIdBlacklistSlot2NET, const std::vector<unsigned int>& DstIdWhitelistSlot2NET, const std::vector<unsigned int>& SrcIdBlacklist, bool selfOnly, const std::vector<unsigned int>& prefixes,unsigned int id,unsigned int callHang,bool TGRewriteSlot1, bool TGRewriteSlot2)
void CDMRAccessControl::init(const std::vector<unsigned int>& dstIdBlacklistSlot1RF, const std::vector<unsigned int>& dstIdWhitelistSlot1RF, const std::vector<unsigned int>& dstIdBlacklistSlot2RF, const std::vector<unsigned int>& dstIdWhitelistSlot2RF, const std::vector<unsigned int>& dstIdBlacklistSlot1NET, const std::vector<unsigned int>& dstIdWhitelistSlot1NET, const std::vector<unsigned int>& dstIdBlacklistSlot2NET, const std::vector<unsigned int>& dstIdWhitelistSlot2NET, const std::vector<unsigned int>& srcIdBlacklist, bool selfOnly, const std::vector<unsigned int>& prefixes, unsigned int id, unsigned int callHang, bool tgRewriteSlot1, bool tgRewriteSlot2)
{
m_dstBlackListSlot1RF = DstIdBlacklistSlot1RF;
m_dstWhiteListSlot1RF = DstIdWhitelistSlot1RF;
m_dstBlackListSlot2RF = DstIdBlacklistSlot2RF;
m_dstWhiteListSlot2RF = DstIdWhitelistSlot2RF;
m_dstBlackListSlot1NET = DstIdBlacklistSlot1NET;
m_dstWhiteListSlot1NET = DstIdWhitelistSlot1NET;
m_dstBlackListSlot2NET = DstIdBlacklistSlot2NET;
m_dstWhiteListSlot2NET = DstIdWhitelistSlot2NET;
m_callHang = callHang;
m_TGRewriteSlot1 = TGRewriteSlot1;
m_TGRewriteSlot2 = TGRewriteSlot2;
m_dstBlackListSlot1RF = dstIdBlacklistSlot1RF;
m_dstWhiteListSlot1RF = dstIdWhitelistSlot1RF;
m_dstBlackListSlot2RF = dstIdBlacklistSlot2RF;
m_dstWhiteListSlot2RF = dstIdWhitelistSlot2RF;
m_dstBlackListSlot1NET = dstIdBlacklistSlot1NET;
m_dstWhiteListSlot1NET = dstIdWhitelistSlot1NET;
m_dstBlackListSlot2NET = dstIdBlacklistSlot2NET;
m_dstWhiteListSlot2NET = dstIdWhitelistSlot2NET;
m_callHang = callHang;
m_tgRewriteSlot1 = tgRewriteSlot1;
m_tgRewriteSlot2 = tgRewriteSlot2;
}
bool DMRAccessControl::DstIdBlacklist(unsigned int did, unsigned int slot, bool network)
bool CDMRAccessControl::dstIdBlacklist(unsigned int did, unsigned int slot, bool network)
{
static std::vector<unsigned int> blacklist;
@@ -83,7 +83,7 @@ bool DMRAccessControl::DstIdBlacklist(unsigned int did, unsigned int slot, bool
return std::find(blacklist.begin(), blacklist.end(), did) != blacklist.end();
}
bool DMRAccessControl::DstIdWhitelist(unsigned int did, unsigned int slot, bool gt4k, bool network)
bool CDMRAccessControl::dstIdWhitelist(unsigned int did, unsigned int slot, bool gt4k, bool network)
{
if (network) {
if (slot == 1U) {
@@ -107,8 +107,9 @@ bool DMRAccessControl::DstIdWhitelist(unsigned int did, unsigned int slot, bool
if (gt4k) {
if (std::find(m_dstWhiteListSlot2NET.begin(), m_dstWhiteListSlot2NET.end(), did) != m_dstWhiteListSlot2NET.end() || did == 0)
return true;
// If dstId in secondary TG range or whitelist
else if (did >= 4000) {
// If dstId in secondary TG range or whitelist
else if (did >= 4000U) {
if (did > 5000U && did < 10000U)
return false;
else
@@ -144,7 +145,7 @@ bool DMRAccessControl::DstIdWhitelist(unsigned int did, unsigned int slot, bool
if (std::find(m_dstWhiteListSlot2RF.begin(), m_dstWhiteListSlot2RF.end(), did) != m_dstWhiteListSlot2RF.end() || did == 0)
return true;
// If dstId in secondary TG range or whitelist
else if (did >= 4000) {
else if (did >= 4000U) {
if (did > 5000U && did < 10000U)
return false;
else
@@ -160,12 +161,12 @@ bool DMRAccessControl::DstIdWhitelist(unsigned int did, unsigned int slot, bool
}
}
bool DMRAccessControl::validateSrcId(unsigned int id)
bool CDMRAccessControl::validateSrcId(unsigned int id)
{
if (m_selfOnly) {
return id == m_id;
} else {
if (std::find(m_SrcIdBlacklist.begin(), m_SrcIdBlacklist.end(), id) != m_SrcIdBlacklist.end())
if (std::find(m_srcIdBlacklist.begin(), m_srcIdBlacklist.end(), id) != m_srcIdBlacklist.end())
return false;
unsigned int prefix = id / 10000U;
@@ -179,54 +180,54 @@ bool DMRAccessControl::validateSrcId(unsigned int id)
}
}
bool DMRAccessControl::validateAccess (unsigned int src_id, unsigned int dst_id, unsigned int slot, bool network)
bool CDMRAccessControl::validateAccess (unsigned int srcId, unsigned int dstId, unsigned int slot, bool network)
{
// source ID validation is only applied to RF traffic
if (!network && !DMRAccessControl::validateSrcId(src_id)) {
LogMessage("DMR Slot %u, invalid access attempt from %u (blacklisted)", slot, src_id);
if (!network && !CDMRAccessControl::validateSrcId(srcId)) {
LogMessage("DMR Slot %u, invalid access attempt from %u (blacklisted)", slot, srcId);
return false;
} else if (DMRAccessControl::DstIdBlacklist(dst_id, slot, network)) {
LogMessage("DMR Slot %u, invalid access attempt to TG%u (TG blacklisted)", slot, dst_id);
} else if (CDMRAccessControl::dstIdBlacklist(dstId, slot, network)) {
LogMessage("DMR Slot %u, invalid access attempt to TG%u (TG blacklisted)", slot, dstId);
return false;
} else if (!DMRAccessControl::DstIdWhitelist(dst_id, slot, true, network)) {
LogMessage("DMR Slot %u, invalid access attempt to TG%u (TG not in whitelist)", slot, dst_id);
} else if (!CDMRAccessControl::dstIdWhitelist(dstId, slot, true, network)) {
LogMessage("DMR Slot %u, invalid access attempt to TG%u (TG not in whitelist)", slot, dstId);
return false;
} else {
return true;
}
}
unsigned int DMRAccessControl::DstIdRewrite (unsigned int did, unsigned int sid, unsigned int slot, bool network)
unsigned int CDMRAccessControl::dstIdRewrite(unsigned int did, unsigned int sid, unsigned int slot, bool network)
{
if (slot == 1U && !m_tgRewriteSlot1)
return 0;
if (slot == 1 && m_TGRewriteSlot1 == false)
return 0;
if (slot == 2 && m_TGRewriteSlot2 == false)
return 0;
if (slot == 2U && !m_tgRewriteSlot2)
return 0;
std::time_t currenttime = std::time(nullptr);
std::time_t currenttime = std::time(nullptr);
if (network) {
m_dstRewriteID = did;
m_SrcID = sid;
if (did < 4000 && did > 0 && did != 9) {
LogMessage("DMR Slot %u, Rewrite DST ID (TG) of of inbound network traffic from %u to 9",slot,did);
return 9;
} else {
return 0;
}
} else if (did == 9 && m_dstRewriteID != 9 && m_dstRewriteID != 0 && (m_time + m_callHang) > currenttime) {
LogMessage("DMR Slot %u, Rewrite DST ID (TG) of outbound network traffic from %u to %u (return traffic during CallHang)",slot,did,m_dstRewriteID);
return(m_dstRewriteID);
} else if (did < 4000 && did > 0 && did !=9) {
m_dstRewriteID = did;
}
return 0;
if (network) {
m_dstRewriteID = did;
m_srcID = sid;
if (did < 4000U && did > 0 && did != 9U) {
LogMessage("DMR Slot %u, Rewrite DST ID (TG) of of inbound network traffic from %u to 9", slot, did);
return 9U;
} else {
return 0U;
}
} else if (did == 9U && m_dstRewriteID != 9U && m_dstRewriteID != 0U && (m_time + m_callHang) > currenttime) {
LogMessage("DMR Slot %u, Rewrite DST ID (TG) of outbound network traffic from %u to %u (return traffic during CallHang)",slot,did,m_dstRewriteID);
return m_dstRewriteID;
} else if (did < 4000U && did > 0U && did != 9U) {
m_dstRewriteID = did;
}
return 0U;
}
void DMRAccessControl::setOverEndTime()
void CDMRAccessControl::setOverEndTime()
{
m_time = std::time(nullptr);
m_time = std::time(nullptr);
}