mirror of
https://github.com/g4klx/MMDVMHost
synced 2025-12-22 08:05:49 +08:00
Clean up TG rewrite code.
This commit is contained in:
Jonathan Naylor
12
Conf.cpp
12
Conf.cpp
@@ -93,8 +93,8 @@ m_dmrBeacons(false),
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m_dmrId(0U),
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m_dmrColorCode(2U),
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m_dmrSelfOnly(false),
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m_TGRewriteSlot1(false),
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m_TGRewriteSlot2(false),
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m_dmrTGRewriteSlot1(false),
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m_dmrTGRewriteSlot2(false),
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m_dmrPrefixes(),
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m_dmrBlackList(),
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m_dmrDstIdBlacklistSlot1RF(),
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@@ -333,9 +333,9 @@ bool CConf::read()
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else if (::strcmp(key, "SelfOnly") == 0)
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m_dmrSelfOnly = ::atoi(value) == 1;
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else if (::strcmp(key, "TGRewriteSlot1") == 0)
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m_TGRewriteSlot1 = ::atoi(value) == 1;
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m_dmrTGRewriteSlot1 = ::atoi(value) == 1;
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else if (::strcmp(key, "TGRewriteSlot2") == 0)
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m_TGRewriteSlot2 = ::atoi(value) == 1;
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m_dmrTGRewriteSlot2 = ::atoi(value) == 1;
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else if (::strcmp(key, "Prefixes") == 0) {
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char* p = ::strtok(value, ",\r\n");
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while (p != NULL) {
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@@ -756,12 +756,12 @@ bool CConf::getDMRSelfOnly() const
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bool CConf::getDMRTGRewriteSlot1() const
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{
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return m_TGRewriteSlot1;
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return m_dmrTGRewriteSlot1;
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}
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bool CConf::getDMRTGRewriteSlot2() const
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{
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return m_TGRewriteSlot2;
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return m_dmrTGRewriteSlot2;
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}
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std::vector<unsigned int> CConf::getDMRPrefixes() const
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4
Conf.h
4
Conf.h
@@ -215,8 +215,8 @@ private:
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unsigned int m_dmrId;
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unsigned int m_dmrColorCode;
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bool m_dmrSelfOnly;
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bool m_TGRewriteSlot1;
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bool m_TGRewriteSlot2;
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bool m_dmrTGRewriteSlot1;
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bool m_dmrTGRewriteSlot2;
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std::vector<unsigned int> m_dmrPrefixes;
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std::vector<unsigned int> m_dmrBlackList;
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std::vector<unsigned int> m_dmrDstIdBlacklistSlot1RF;
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@@ -20,51 +20,51 @@
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#include <vector>
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#include <ctime>
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std::vector<unsigned int> DMRAccessControl::m_dstBlackListSlot1RF;
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std::vector<unsigned int> DMRAccessControl::m_dstBlackListSlot2RF;
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std::vector<unsigned int> DMRAccessControl::m_dstWhiteListSlot1RF;
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std::vector<unsigned int> DMRAccessControl::m_dstWhiteListSlot2RF;
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std::vector<unsigned int> CDMRAccessControl::m_dstBlackListSlot1RF;
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std::vector<unsigned int> CDMRAccessControl::m_dstBlackListSlot2RF;
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std::vector<unsigned int> CDMRAccessControl::m_dstWhiteListSlot1RF;
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std::vector<unsigned int> CDMRAccessControl::m_dstWhiteListSlot2RF;
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std::vector<unsigned int> DMRAccessControl::m_dstBlackListSlot1NET;
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std::vector<unsigned int> DMRAccessControl::m_dstBlackListSlot2NET;
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std::vector<unsigned int> DMRAccessControl::m_dstWhiteListSlot1NET;
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std::vector<unsigned int> DMRAccessControl::m_dstWhiteListSlot2NET;
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std::vector<unsigned int> CDMRAccessControl::m_dstBlackListSlot1NET;
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std::vector<unsigned int> CDMRAccessControl::m_dstBlackListSlot2NET;
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std::vector<unsigned int> CDMRAccessControl::m_dstWhiteListSlot1NET;
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std::vector<unsigned int> CDMRAccessControl::m_dstWhiteListSlot2NET;
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std::vector<unsigned int> DMRAccessControl::m_SrcIdBlacklist;
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std::vector<unsigned int> CDMRAccessControl::m_srcIdBlacklist;
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std::vector<unsigned int> DMRAccessControl::m_prefixes;
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std::vector<unsigned int> CDMRAccessControl::m_prefixes;
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bool DMRAccessControl::m_selfOnly = false;
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bool CDMRAccessControl::m_selfOnly = false;
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unsigned int DMRAccessControl::m_id = 0U;
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unsigned int CDMRAccessControl::m_id = 0U;
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unsigned int DMRAccessControl::m_dstRewriteID = 0U;
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unsigned int DMRAccessControl::m_SrcID = 0U;
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unsigned int CDMRAccessControl::m_dstRewriteID = 0U;
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unsigned int CDMRAccessControl::m_srcID = 0U;
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std::time_t DMRAccessControl::m_time;
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std::time_t CDMRAccessControl::m_time;
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unsigned int DMRAccessControl::m_callHang;
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unsigned int CDMRAccessControl::m_callHang = 0U;
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bool DMRAccessControl::m_TGRewriteSlot1;
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bool DMRAccessControl::m_TGRewriteSlot2;
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bool CDMRAccessControl::m_tgRewriteSlot1 = false;
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bool CDMRAccessControl::m_tgRewriteSlot2 = false;
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void DMRAccessControl::init(const std::vector<unsigned int>& DstIdBlacklistSlot1RF, const std::vector<unsigned int>& DstIdWhitelistSlot1RF, const std::vector<unsigned int>& DstIdBlacklistSlot2RF, const std::vector<unsigned int>& DstIdWhitelistSlot2RF, const std::vector<unsigned int>& DstIdBlacklistSlot1NET, const std::vector<unsigned int>& DstIdWhitelistSlot1NET, const std::vector<unsigned int>& DstIdBlacklistSlot2NET, const std::vector<unsigned int>& DstIdWhitelistSlot2NET, const std::vector<unsigned int>& SrcIdBlacklist, bool selfOnly, const std::vector<unsigned int>& prefixes,unsigned int id,unsigned int callHang,bool TGRewriteSlot1, bool TGRewriteSlot2)
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void CDMRAccessControl::init(const std::vector<unsigned int>& dstIdBlacklistSlot1RF, const std::vector<unsigned int>& dstIdWhitelistSlot1RF, const std::vector<unsigned int>& dstIdBlacklistSlot2RF, const std::vector<unsigned int>& dstIdWhitelistSlot2RF, const std::vector<unsigned int>& dstIdBlacklistSlot1NET, const std::vector<unsigned int>& dstIdWhitelistSlot1NET, const std::vector<unsigned int>& dstIdBlacklistSlot2NET, const std::vector<unsigned int>& dstIdWhitelistSlot2NET, const std::vector<unsigned int>& srcIdBlacklist, bool selfOnly, const std::vector<unsigned int>& prefixes, unsigned int id, unsigned int callHang, bool tgRewriteSlot1, bool tgRewriteSlot2)
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{
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m_dstBlackListSlot1RF = DstIdBlacklistSlot1RF;
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m_dstWhiteListSlot1RF = DstIdWhitelistSlot1RF;
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m_dstBlackListSlot2RF = DstIdBlacklistSlot2RF;
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m_dstWhiteListSlot2RF = DstIdWhitelistSlot2RF;
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m_dstBlackListSlot1NET = DstIdBlacklistSlot1NET;
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m_dstWhiteListSlot1NET = DstIdWhitelistSlot1NET;
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m_dstBlackListSlot2NET = DstIdBlacklistSlot2NET;
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m_dstWhiteListSlot2NET = DstIdWhitelistSlot2NET;
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m_dstBlackListSlot1RF = dstIdBlacklistSlot1RF;
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m_dstWhiteListSlot1RF = dstIdWhitelistSlot1RF;
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m_dstBlackListSlot2RF = dstIdBlacklistSlot2RF;
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m_dstWhiteListSlot2RF = dstIdWhitelistSlot2RF;
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m_dstBlackListSlot1NET = dstIdBlacklistSlot1NET;
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m_dstWhiteListSlot1NET = dstIdWhitelistSlot1NET;
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m_dstBlackListSlot2NET = dstIdBlacklistSlot2NET;
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m_dstWhiteListSlot2NET = dstIdWhitelistSlot2NET;
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m_callHang = callHang;
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m_TGRewriteSlot1 = TGRewriteSlot1;
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m_TGRewriteSlot2 = TGRewriteSlot2;
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m_tgRewriteSlot1 = tgRewriteSlot1;
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m_tgRewriteSlot2 = tgRewriteSlot2;
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}
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bool DMRAccessControl::DstIdBlacklist(unsigned int did, unsigned int slot, bool network)
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bool CDMRAccessControl::dstIdBlacklist(unsigned int did, unsigned int slot, bool network)
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{
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static std::vector<unsigned int> blacklist;
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@@ -83,7 +83,7 @@ bool DMRAccessControl::DstIdBlacklist(unsigned int did, unsigned int slot, bool
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return std::find(blacklist.begin(), blacklist.end(), did) != blacklist.end();
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}
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bool DMRAccessControl::DstIdWhitelist(unsigned int did, unsigned int slot, bool gt4k, bool network)
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bool CDMRAccessControl::dstIdWhitelist(unsigned int did, unsigned int slot, bool gt4k, bool network)
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{
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if (network) {
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if (slot == 1U) {
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@@ -107,8 +107,9 @@ bool DMRAccessControl::DstIdWhitelist(unsigned int did, unsigned int slot, bool
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if (gt4k) {
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if (std::find(m_dstWhiteListSlot2NET.begin(), m_dstWhiteListSlot2NET.end(), did) != m_dstWhiteListSlot2NET.end() || did == 0)
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return true;
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// If dstId in secondary TG range or whitelist
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else if (did >= 4000) {
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else if (did >= 4000U) {
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if (did > 5000U && did < 10000U)
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return false;
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else
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@@ -144,7 +145,7 @@ bool DMRAccessControl::DstIdWhitelist(unsigned int did, unsigned int slot, bool
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if (std::find(m_dstWhiteListSlot2RF.begin(), m_dstWhiteListSlot2RF.end(), did) != m_dstWhiteListSlot2RF.end() || did == 0)
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return true;
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// If dstId in secondary TG range or whitelist
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else if (did >= 4000) {
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else if (did >= 4000U) {
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if (did > 5000U && did < 10000U)
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return false;
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else
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@@ -160,12 +161,12 @@ bool DMRAccessControl::DstIdWhitelist(unsigned int did, unsigned int slot, bool
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}
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}
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bool DMRAccessControl::validateSrcId(unsigned int id)
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bool CDMRAccessControl::validateSrcId(unsigned int id)
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{
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if (m_selfOnly) {
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return id == m_id;
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} else {
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if (std::find(m_SrcIdBlacklist.begin(), m_SrcIdBlacklist.end(), id) != m_SrcIdBlacklist.end())
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if (std::find(m_srcIdBlacklist.begin(), m_srcIdBlacklist.end(), id) != m_srcIdBlacklist.end())
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return false;
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unsigned int prefix = id / 10000U;
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@@ -179,54 +180,54 @@ bool DMRAccessControl::validateSrcId(unsigned int id)
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}
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}
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bool DMRAccessControl::validateAccess (unsigned int src_id, unsigned int dst_id, unsigned int slot, bool network)
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bool CDMRAccessControl::validateAccess (unsigned int srcId, unsigned int dstId, unsigned int slot, bool network)
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{
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// source ID validation is only applied to RF traffic
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if (!network && !DMRAccessControl::validateSrcId(src_id)) {
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LogMessage("DMR Slot %u, invalid access attempt from %u (blacklisted)", slot, src_id);
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if (!network && !CDMRAccessControl::validateSrcId(srcId)) {
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LogMessage("DMR Slot %u, invalid access attempt from %u (blacklisted)", slot, srcId);
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return false;
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} else if (DMRAccessControl::DstIdBlacklist(dst_id, slot, network)) {
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LogMessage("DMR Slot %u, invalid access attempt to TG%u (TG blacklisted)", slot, dst_id);
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} else if (CDMRAccessControl::dstIdBlacklist(dstId, slot, network)) {
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LogMessage("DMR Slot %u, invalid access attempt to TG%u (TG blacklisted)", slot, dstId);
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return false;
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} else if (!DMRAccessControl::DstIdWhitelist(dst_id, slot, true, network)) {
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LogMessage("DMR Slot %u, invalid access attempt to TG%u (TG not in whitelist)", slot, dst_id);
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} else if (!CDMRAccessControl::dstIdWhitelist(dstId, slot, true, network)) {
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LogMessage("DMR Slot %u, invalid access attempt to TG%u (TG not in whitelist)", slot, dstId);
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return false;
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} else {
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return true;
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}
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}
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unsigned int DMRAccessControl::DstIdRewrite (unsigned int did, unsigned int sid, unsigned int slot, bool network)
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unsigned int CDMRAccessControl::dstIdRewrite(unsigned int did, unsigned int sid, unsigned int slot, bool network)
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{
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if (slot == 1 && m_TGRewriteSlot1 == false)
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if (slot == 1U && !m_tgRewriteSlot1)
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return 0;
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if (slot == 2 && m_TGRewriteSlot2 == false)
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if (slot == 2U && !m_tgRewriteSlot2)
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return 0;
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std::time_t currenttime = std::time(nullptr);
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if (network) {
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m_dstRewriteID = did;
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m_SrcID = sid;
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if (did < 4000 && did > 0 && did != 9) {
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LogMessage("DMR Slot %u, Rewrite DST ID (TG) of of inbound network traffic from %u to 9",slot,did);
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return 9;
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m_srcID = sid;
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if (did < 4000U && did > 0 && did != 9U) {
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LogMessage("DMR Slot %u, Rewrite DST ID (TG) of of inbound network traffic from %u to 9", slot, did);
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return 9U;
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} else {
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return 0;
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return 0U;
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}
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} else if (did == 9 && m_dstRewriteID != 9 && m_dstRewriteID != 0 && (m_time + m_callHang) > currenttime) {
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} else if (did == 9U && m_dstRewriteID != 9U && m_dstRewriteID != 0U && (m_time + m_callHang) > currenttime) {
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LogMessage("DMR Slot %u, Rewrite DST ID (TG) of outbound network traffic from %u to %u (return traffic during CallHang)",slot,did,m_dstRewriteID);
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return(m_dstRewriteID);
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} else if (did < 4000 && did > 0 && did !=9) {
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return m_dstRewriteID;
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} else if (did < 4000U && did > 0U && did != 9U) {
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m_dstRewriteID = did;
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}
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return 0;
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return 0U;
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}
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void DMRAccessControl::setOverEndTime()
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void CDMRAccessControl::setOverEndTime()
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{
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m_time = std::time(nullptr);
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}
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@@ -18,13 +18,14 @@
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#include <vector>
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#include <ctime>
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class DMRAccessControl {
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class CDMRAccessControl {
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public:
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static bool validateAccess (unsigned int src_id, unsigned int dst_id, unsigned int slot, bool network);
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static bool validateAccess(unsigned int srcId, unsigned int dstId, unsigned int slot, bool network);
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static void init(const std::vector<unsigned int>& DstIdBlacklistSlot1RF, const std::vector<unsigned int>& DstIdWhitelistSlot1RF, const std::vector<unsigned int>& DstIdBlacklistSlot2RF, const std::vector<unsigned int>& DstIdWhitelistSlot2RF, const std::vector<unsigned int>& DstIdBlacklistSlot1NET, const std::vector<unsigned int>& DstIdWhitelistSlot1NET, const std::vector<unsigned int>& DstIdBlacklistSlot2NET, const std::vector<unsigned int>& DstIdWhitelistSlot2NET, const std::vector<unsigned int>& SrcIdBlacklist, bool selfOnly, const std::vector<unsigned int>& prefixes,unsigned int id,unsigned int callHang, bool TGRewrteSlot1, bool TGRewrteSlot2);
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static void init(const std::vector<unsigned int>& dstIdBlacklistSlot1RF, const std::vector<unsigned int>& dstIdWhitelistSlot1RF, const std::vector<unsigned int>& dstIdBlacklistSlot2RF, const std::vector<unsigned int>& dstIdWhitelistSlot2RF, const std::vector<unsigned int>& dstIdBlacklistSlot1NET, const std::vector<unsigned int>& dstIdWhitelistSlot1NET, const std::vector<unsigned int>& dstIdBlacklistSlot2NET, const std::vector<unsigned int>& dstIdWhitelistSlot2NET, const std::vector<unsigned int>& srcIdBlacklist, bool selfOnly, const std::vector<unsigned int>& prefixes, unsigned int id, unsigned int callHang, bool tgRewrteSlot1, bool tgRewrteSlot2);
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static unsigned int dstIdRewrite(unsigned int id, unsigned int sid,unsigned int slot, bool network);
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static unsigned int DstIdRewrite(unsigned int id, unsigned int sid,unsigned int slot, bool network);
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static void setOverEndTime();
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private:
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@@ -38,7 +39,7 @@ private:
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static std::vector<unsigned int> m_dstWhiteListSlot1NET;
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static std::vector<unsigned int> m_dstWhiteListSlot2NET;
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static std::vector<unsigned int> m_SrcIdBlacklist;
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static std::vector<unsigned int> m_srcIdBlacklist;
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static std::vector<unsigned int> m_prefixes;
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@@ -47,21 +48,18 @@ private:
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static bool m_selfOnly;
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static unsigned int m_id;
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static bool DstIdBlacklist(unsigned int did,unsigned int slot, bool network);
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static bool DstIdWhitelist(unsigned int did,unsigned int slot,bool gt4k, bool network);
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static bool dstIdBlacklist(unsigned int did,unsigned int slot, bool network);
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static bool dstIdWhitelist(unsigned int did,unsigned int slot,bool gt4k, bool network);
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static bool validateSrcId(unsigned int id);
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static std::time_t m_time;
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static unsigned int m_dstRewriteID;
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static unsigned int m_SrcID;
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static bool m_TGRewriteSlot1;
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static bool m_TGRewriteSlot2;
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static unsigned int m_srcID;
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static bool m_tgRewriteSlot1;
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static bool m_tgRewriteSlot2;
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};
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#endif
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64
DMRSlot.cpp
64
DMRSlot.cpp
@@ -154,16 +154,14 @@ void CDMRSlot::writeModem(unsigned char *data, unsigned int len)
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unsigned int sid = lc->getSrcId();
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unsigned int did = lc->getDstId();
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if (!DMRAccessControl::validateAccess(sid, did, m_slotNo, false)) {
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if (!CDMRAccessControl::validateAccess(sid, did, m_slotNo, false)) {
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delete lc;
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return;
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}
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unsigned int rw_id = DMRAccessControl::DstIdRewrite(did,sid,m_slotNo,false);
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if (rw_id) {
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lc->setDstId(rw_id);
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}
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unsigned int rwId = CDMRAccessControl::dstIdRewrite(did, sid, m_slotNo, false);
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if (rwId != 0U)
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lc->setDstId(rwId);
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m_rfLC = lc;
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@@ -262,7 +260,7 @@ void CDMRSlot::writeModem(unsigned char *data, unsigned int len)
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LogMessage("DMR Slot %u, received RF end of voice transmission, %.1f seconds, BER: %.1f%%", m_slotNo, float(m_rfFrames) / 16.667F, float(m_rfErrs * 100U) / float(m_rfBits));
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writeEndRF();
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DMRAccessControl::setOverEndTime();
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CDMRAccessControl::setOverEndTime();
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} else if (dataType == DT_DATA_HEADER) {
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if (m_rfState == RS_RF_DATA)
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return;
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@@ -275,10 +273,9 @@ void CDMRSlot::writeModem(unsigned char *data, unsigned int len)
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bool gi = dataHeader.getGI();
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unsigned int srcId = dataHeader.getSrcId();
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unsigned int dstId = dataHeader.getDstId();
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if (!DMRAccessControl::validateAccess(srcId, dstId, m_slotNo, false))
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if (!CDMRAccessControl::validateAccess(srcId, dstId, m_slotNo, false))
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return;
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m_rfFrames = dataHeader.getBlocks();
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m_rfDataHeader = dataHeader;
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@@ -331,7 +328,7 @@ void CDMRSlot::writeModem(unsigned char *data, unsigned int len)
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bool gi = csbk.getGI();
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unsigned int srcId = csbk.getSrcId();
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unsigned int dstId = csbk.getDstId();
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if (!DMRAccessControl::validateAccess(srcId, dstId, m_slotNo, false))
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if (!CDMRAccessControl::validateAccess(srcId, dstId, m_slotNo, false))
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return;
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// Regenerate the CSBK data
|
||||
@@ -488,16 +485,15 @@ void CDMRSlot::writeModem(unsigned char *data, unsigned int len)
|
||||
if (lc != NULL) {
|
||||
unsigned int sid = lc->getSrcId();
|
||||
unsigned int did = lc->getDstId();
|
||||
if (!DMRAccessControl::validateAccess(sid,did,m_slotNo,false)) {
|
||||
if (!CDMRAccessControl::validateAccess(sid, did, m_slotNo, false)) {
|
||||
delete lc;
|
||||
return;
|
||||
}
|
||||
// Test dst rewrite
|
||||
unsigned int rw_id = DMRAccessControl::DstIdRewrite(did,sid,m_slotNo,false);
|
||||
if (rw_id) {
|
||||
|
||||
lc->setDstId(rw_id);
|
||||
}
|
||||
// Test dst rewrite
|
||||
unsigned int rwId = CDMRAccessControl::dstIdRewrite(did, sid, m_slotNo, false);
|
||||
if (rwId != 0U)
|
||||
lc->setDstId(rwId);
|
||||
|
||||
m_rfLC = lc;
|
||||
|
||||
@@ -774,15 +770,13 @@ void CDMRSlot::writeNetwork(const CDMRData& dmrData)
|
||||
|
||||
unsigned int did = m_netLC->getDstId();
|
||||
unsigned int sid = m_netLC->getSrcId();
|
||||
if (!DMRAccessControl::validateAccess(sid, did, m_slotNo, true))
|
||||
if (!CDMRAccessControl::validateAccess(sid, did, m_slotNo, true))
|
||||
return;
|
||||
|
||||
// Test dst rewrite
|
||||
unsigned int rw_id = DMRAccessControl::DstIdRewrite(did, sid,m_slotNo, true);
|
||||
if (rw_id) {
|
||||
|
||||
m_netLC->setDstId(rw_id);
|
||||
}
|
||||
unsigned int rwId = CDMRAccessControl::dstIdRewrite(did, sid, m_slotNo, true);
|
||||
if (rwId != 0U)
|
||||
m_netLC->setDstId(rwId);
|
||||
|
||||
// Store the LC for the embedded LC
|
||||
m_netEmbeddedLC.setData(*m_netLC);
|
||||
@@ -844,15 +838,13 @@ void CDMRSlot::writeNetwork(const CDMRData& dmrData)
|
||||
|
||||
unsigned int did = m_netLC->getDstId();
|
||||
unsigned int sid = m_netLC->getSrcId();
|
||||
if (!DMRAccessControl::validateAccess(sid, did, m_slotNo, true))
|
||||
if (!CDMRAccessControl::validateAccess(sid, did, m_slotNo, true))
|
||||
return;
|
||||
|
||||
// Test dst rewrite
|
||||
unsigned int rw_id = DMRAccessControl::DstIdRewrite(did,sid,m_slotNo,true);
|
||||
if (rw_id) {
|
||||
|
||||
m_netLC->setDstId(rw_id);
|
||||
}
|
||||
unsigned int rwId = CDMRAccessControl::dstIdRewrite(did, sid, m_slotNo, true);
|
||||
if (rwId != 0U)
|
||||
m_netLC->setDstId(rwId);
|
||||
|
||||
// Regenerate the Slot Type
|
||||
CDMRSlotType slotType;
|
||||
@@ -883,7 +875,7 @@ void CDMRSlot::writeNetwork(const CDMRData& dmrData)
|
||||
|
||||
unsigned int did = m_netLC->getDstId();
|
||||
unsigned int id = m_netLC->getSrcId();
|
||||
if (!DMRAccessControl::validateAccess(id, did, m_slotNo, true))
|
||||
if (!CDMRAccessControl::validateAccess(id, did, m_slotNo, true))
|
||||
return;
|
||||
|
||||
// Regenerate the LC data
|
||||
@@ -919,7 +911,7 @@ void CDMRSlot::writeNetwork(const CDMRData& dmrData)
|
||||
LogMessage("DMR Slot %u, received network end of voice transmission, %.1f seconds, %u%% packet loss, BER: %.1f%%", m_slotNo, float(m_netFrames) / 16.667F, (m_netLost * 100U) / m_netFrames, float(m_netErrs * 100U) / float(m_netBits));
|
||||
|
||||
writeEndNet();
|
||||
DMRAccessControl::setOverEndTime();
|
||||
CDMRAccessControl::setOverEndTime();
|
||||
} else if (dataType == DT_DATA_HEADER) {
|
||||
if (m_netState == RS_NET_DATA)
|
||||
return;
|
||||
@@ -936,7 +928,7 @@ void CDMRSlot::writeNetwork(const CDMRData& dmrData)
|
||||
bool gi = dataHeader.getGI();
|
||||
unsigned int srcId = dataHeader.getSrcId();
|
||||
unsigned int dstId = dataHeader.getDstId();
|
||||
if (!DMRAccessControl::validateAccess(srcId, dstId, m_slotNo, true))
|
||||
if (!CDMRAccessControl::validateAccess(srcId, dstId, m_slotNo, true))
|
||||
return;
|
||||
|
||||
m_netFrames = dataHeader.getBlocks();
|
||||
@@ -981,7 +973,7 @@ void CDMRSlot::writeNetwork(const CDMRData& dmrData)
|
||||
|
||||
unsigned int did = dmrData.getDstId();
|
||||
unsigned int id = dmrData.getSrcId();
|
||||
if (!DMRAccessControl::validateAccess(id, did, m_slotNo, true))
|
||||
if (!CDMRAccessControl::validateAccess(id, did, m_slotNo, true))
|
||||
return;
|
||||
|
||||
m_lastFrameValid = false;
|
||||
@@ -1080,7 +1072,7 @@ void CDMRSlot::writeNetwork(const CDMRData& dmrData)
|
||||
|
||||
unsigned int did = m_netLC->getDstId();
|
||||
unsigned int id = m_netLC->getSrcId();
|
||||
if (!DMRAccessControl::validateAccess(id, did, m_slotNo, true))
|
||||
if (!CDMRAccessControl::validateAccess(id, did, m_slotNo, true))
|
||||
return;
|
||||
|
||||
unsigned char fid = m_netLC->getFID();
|
||||
@@ -1140,7 +1132,7 @@ void CDMRSlot::writeNetwork(const CDMRData& dmrData)
|
||||
bool gi = csbk.getGI();
|
||||
unsigned int srcId = csbk.getSrcId();
|
||||
unsigned int dstId = csbk.getDstId();
|
||||
if (!DMRAccessControl::validateAccess(srcId,dstId,m_slotNo,true))
|
||||
if (!CDMRAccessControl::validateAccess(srcId, dstId, m_slotNo, true))
|
||||
return;
|
||||
|
||||
// Regenerate the CSBK data
|
||||
@@ -1362,7 +1354,7 @@ void CDMRSlot::writeQueueNet(const unsigned char *data)
|
||||
m_queue.addData(data, len);
|
||||
}
|
||||
|
||||
void CDMRSlot::init(unsigned int id, unsigned int colorCode, unsigned int callHang, bool selfOnly, const std::vector<unsigned int>& prefixes, const std::vector<unsigned int>& SrcIdBlacklist, const std::vector<unsigned int>& DstIdBlacklistSlot1RF, const std::vector<unsigned int>& DstIdWhitelistSlot1RF, const std::vector<unsigned int>& DstIdBlacklistSlot2RF, const std::vector<unsigned int>& DstIdWhitelistSlot2RF, const std::vector<unsigned int>& DstIdBlacklistSlot1NET, const std::vector<unsigned int>& DstIdWhitelistSlot1NET, const std::vector<unsigned int>& DstIdBlacklistSlot2NET, const std::vector<unsigned int>& DstIdWhitelistSlot2NET, CModem* modem, CDMRIPSC* network, CDisplay* display, bool duplex, CDMRLookup* lookup, int rssiMultiplier, int rssiOffset, unsigned int jitter, bool TGRewriteSlot1, bool TGRewriteSlot2)
|
||||
void CDMRSlot::init(unsigned int id, unsigned int colorCode, unsigned int callHang, bool selfOnly, const std::vector<unsigned int>& prefixes, const std::vector<unsigned int>& srcIdBlacklist, const std::vector<unsigned int>& dstIdBlacklistSlot1RF, const std::vector<unsigned int>& dstIdWhitelistSlot1RF, const std::vector<unsigned int>& dstIdBlacklistSlot2RF, const std::vector<unsigned int>& dstIdWhitelistSlot2RF, const std::vector<unsigned int>& dstIdBlacklistSlot1NET, const std::vector<unsigned int>& dstIdWhitelistSlot1NET, const std::vector<unsigned int>& dstIdBlacklistSlot2NET, const std::vector<unsigned int>& dstIdWhitelistSlot2NET, CModem* modem, CDMRIPSC* network, CDisplay* display, bool duplex, CDMRLookup* lookup, int rssiMultiplier, int rssiOffset, unsigned int jitter, bool tgRewriteSlot1, bool tgRewriteSlot2)
|
||||
{
|
||||
assert(id != 0U);
|
||||
assert(modem != NULL);
|
||||
@@ -1397,7 +1389,7 @@ void CDMRSlot::init(unsigned int id, unsigned int colorCode, unsigned int callHa
|
||||
slotType.getData(m_idle + 2U);
|
||||
|
||||
//Load black and white lists to DMRAccessControl
|
||||
DMRAccessControl::init(DstIdBlacklistSlot1RF, DstIdWhitelistSlot1RF, DstIdBlacklistSlot2RF, DstIdWhitelistSlot2RF, DstIdBlacklistSlot1NET, DstIdWhitelistSlot1NET, DstIdBlacklistSlot2NET, DstIdWhitelistSlot2NET, SrcIdBlacklist, m_selfOnly, m_prefixes, m_id,callHang, TGRewriteSlot1, TGRewriteSlot2);
|
||||
CDMRAccessControl::init(dstIdBlacklistSlot1RF, dstIdWhitelistSlot1RF, dstIdBlacklistSlot2RF, dstIdWhitelistSlot2RF, dstIdBlacklistSlot1NET, dstIdWhitelistSlot1NET, dstIdBlacklistSlot2NET, dstIdWhitelistSlot2NET, srcIdBlacklist, m_selfOnly, m_prefixes, m_id, callHang, tgRewriteSlot1, tgRewriteSlot2);
|
||||
}
|
||||
|
||||
|
||||
|
||||
@@ -72,6 +72,8 @@ TXHang=4
|
||||
#DstIdBlackListSlot2NET=
|
||||
#DstIdWhiteListSlot1NET=
|
||||
#DstIdWhiteListSlot2NET=
|
||||
#TGRewriteSlot1=0
|
||||
#TGRewriteSlot2=0
|
||||
|
||||
[System Fusion]
|
||||
Enable=1
|
||||
|
||||
@@ -296,8 +296,8 @@ int CMMDVMHost::run()
|
||||
unsigned int id = m_conf.getDMRId();
|
||||
unsigned int colorCode = m_conf.getDMRColorCode();
|
||||
bool selfOnly = m_conf.getDMRSelfOnly();
|
||||
bool TGRewriteSlot1 = m_conf.getDMRTGRewriteSlot1();
|
||||
bool TGRewriteSlot2 = m_conf.getDMRTGRewriteSlot2();
|
||||
bool tgRewriteSlot1 = m_conf.getDMRTGRewriteSlot1();
|
||||
bool tgRewriteSlot2 = m_conf.getDMRTGRewriteSlot2();
|
||||
std::vector<unsigned int> prefixes = m_conf.getDMRPrefixes();
|
||||
std::vector<unsigned int> blackList = m_conf.getDMRBlackList();
|
||||
std::vector<unsigned int> dstIDBlackListSlot1RF = m_conf.getDMRDstIdBlacklistSlot1RF();
|
||||
@@ -357,14 +357,13 @@ int CMMDVMHost::run()
|
||||
LogInfo(" RSSI Offset: %d", rssiOffset);
|
||||
}
|
||||
|
||||
if (TGRewriteSlot1)
|
||||
if (tgRewriteSlot1)
|
||||
LogInfo(" TG Rewrite Slot 1 enabled");
|
||||
|
||||
if (TGRewriteSlot2)
|
||||
if (tgRewriteSlot2)
|
||||
LogInfo(" TG Rewrite Slot 2 enabled");
|
||||
|
||||
|
||||
dmr = new CDMRControl(id, colorCode, callHang, selfOnly, prefixes, blackList,dstIDBlackListSlot1RF,dstIDWhiteListSlot1RF, dstIDBlackListSlot2RF, dstIDWhiteListSlot2RF, dstIDBlackListSlot1NET,dstIDWhiteListSlot1NET, dstIDBlackListSlot2NET, dstIDWhiteListSlot2NET, m_timeout, m_modem, m_dmrNetwork, m_display, m_duplex, lookupFile, rssiMultiplier, rssiOffset, jitter, TGRewriteSlot1, TGRewriteSlot2);
|
||||
dmr = new CDMRControl(id, colorCode, callHang, selfOnly, prefixes, blackList,dstIDBlackListSlot1RF,dstIDWhiteListSlot1RF, dstIDBlackListSlot2RF, dstIDWhiteListSlot2RF, dstIDBlackListSlot1NET,dstIDWhiteListSlot1NET, dstIDBlackListSlot2NET, dstIDWhiteListSlot2NET, m_timeout, m_modem, m_dmrNetwork, m_display, m_duplex, lookupFile, rssiMultiplier, rssiOffset, jitter, tgRewriteSlot1, tgRewriteSlot2);
|
||||
|
||||
m_dmrTXTimer.setTimeout(txHang);
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user