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Begin the dynamic TG support.

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This commit is contained in:
Jonathan Naylor
2020-04-01 22:22:12 +01:00
parent 0014432195
commit 10e890bdd4
11 changed files with 539 additions and 76 deletions
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84
RewriteDynTGNet.cpp Normal file
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/*
* Copyright (C) 2017,2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "RewriteDynTGNet.h"
#include "DMRDefines.h"
#include "Log.h"
#include <cstdio>
#include <cassert>
CRewriteDynTGNet::CRewriteDynTGNet(const std::string& name, unsigned int slot, unsigned int fromTG, unsigned int toTG, unsigned int discTG, unsigned int range) :
CRewrite(),
m_name(name),
m_slot(slot),
m_fromTGStart(fromTG),
m_fromTGEnd(fromTG + range - 1U),
m_toTG(toTG),
m_discTG(discTG),
m_currentTG(0U)
{
assert(slot == 1U || slot == 2U);
}
CRewriteDynTGNet::~CRewriteDynTGNet()
{
}
bool CRewriteDynTGNet::process(CDMRData& data, bool trace)
{
FLCO flco = data.getFLCO();
unsigned int dstId = data.getDstId();
unsigned int slotNo = data.getSlotNo();
if (flco != FLCO_GROUP || slotNo != m_fromSlot || dstId < m_fromTGStart || dstId > m_fromTGEnd) {
if (trace) {
if (m_fromTGStart == m_fromTGEnd)
LogDebug("Rule Trace,\tRewriteDynTGNet from %s Slot=%u Dst=TG%u: not matched", m_name.c_str(), m_fromSlot, m_fromTGStart);
else
LogDebug("Rule Trace,\tRewriteDynTGNet from %s Slot=%u Dst=TG%u-TG%u: not matched", m_name.c_str(), m_fromSlot, m_fromTGStart, m_fromTGEnd);
}
return false;
}
if (m_fromSlot != m_toSlot)
data.setSlotNo(m_toSlot);
if (m_fromTGStart != m_toTGStart) {
unsigned int newTG = dstId + m_toTGStart - m_fromTGStart;
data.setDstId(newTG);
processMessage(data);
}
if (trace) {
if (m_fromTGStart == m_fromTGEnd)
LogDebug("Rule Trace,\tRewriteDynTGNet from %s Slot=%u Dst=TG%u: matched", m_name.c_str(), m_fromSlot, m_fromTGStart);
else
LogDebug("Rule Trace,\tRewriteDynTGNet from %s Slot=%u Dst=TG%u-TG%u: matched", m_name.c_str(), m_fromSlot, m_fromTGStart, m_fromTGEnd);
if (m_toTGStart == m_toTGEnd)
LogDebug("Rule Trace,\tRewriteDynTGNet to %s Slot=%u Dst=TG%u", m_name.c_str(), m_toSlot, m_toTGStart);
else
LogDebug("Rule Trace,\tRewriteDynTGNet to %s Slot=%u Dst=TG%u-TG%u", m_name.c_str(), m_toSlot, m_toTGStart, m_toTGEnd);
}
return true;
}