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Merge pull request #19 from g0wfv/develop

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Alterations to rule tracing
This commit is contained in:
Jonathan Naylor
2017-06-07 15:31:52 +01:00
committed by GitHub
parent 7cd557de8a e4b3f2b6cb
commit 1b96901f88
5 changed files with 34 additions and 12 deletions
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15
RewritePC.cpp
View File

@@ -29,9 +29,10 @@ CRewritePC::CRewritePC(const char* name, unsigned int fromSlot, unsigned int fro
m_name(name),
m_fromSlot(fromSlot),
m_fromIdStart(fromId),
m_fromIdEnd(fromId + range),
m_fromIdEnd(fromId + range - 1U),
m_toSlot(toSlot),
m_toIdStart(toId),
m_toIdEnd(toId + range - 1U),
m_trace(trace),
m_lc(FLCO_USER_USER, 0U, 0U),
m_embeddedLC()
@@ -49,7 +50,10 @@ bool CRewritePC::processRF(CDMRData& data)
bool ret = process(data);
if (m_trace)
LogDebug("Rule Trace,\tRewritePC %s Slot=%u Dst=%u-%u: %s", m_name, m_fromSlot, m_fromIdStart, m_fromIdEnd, ret ? "matched" : "not matched");
LogDebug("Rule Trace,\tRewritePC from %s Slot=%u Dst=%u-%u: %s", m_name, m_fromSlot, m_fromIdStart, m_fromIdEnd, ret ? "matched" : "not matched");
if (m_trace && ret)
LogDebug("Rule Trace,\tRewritePC to %s Slot=%u Dst=%u-%u", m_name, m_toSlot, m_toIdStart, m_toIdEnd);
return ret;
}
@@ -59,7 +63,10 @@ bool CRewritePC::processNet(CDMRData& data)
bool ret = process(data);
if (m_trace)
LogDebug("Rule Trace,\tRewritePC %s Slot=%u Dst=%u-%u: %s", m_name, m_fromSlot, m_fromIdStart, m_fromIdEnd, ret ? "matched" : "not matched");
LogDebug("Rule Trace,\tRewritePC from %s Slot=%u Dst=%u-%u: %s", m_name, m_fromSlot, m_fromIdStart, m_fromIdEnd, ret ? "matched" : "not matched");
if (m_trace && ret)
LogDebug("Rule Trace,\tRewritePC to %s Slot=%u Dst=%u-%u", m_name, m_toSlot, m_toIdStart, m_toIdEnd);
return ret;
}
@@ -70,7 +77,7 @@ bool CRewritePC::process(CDMRData& data)
unsigned int dstId = data.getDstId();
unsigned int slotNo = data.getSlotNo();
if (flco != FLCO_USER_USER || slotNo != m_fromSlot || dstId < m_fromIdStart || dstId >= m_fromIdEnd)
if (flco != FLCO_USER_USER || slotNo != m_fromSlot || dstId < m_fromIdStart || dstId > m_fromIdEnd)
return false;
if (m_fromSlot != m_toSlot)

1
RewritePC.h
View File

@@ -39,6 +39,7 @@ private:
unsigned int m_fromIdEnd;
unsigned int m_toSlot;
unsigned int m_toIdStart;
unsigned int m_toIdEnd;
bool m_trace;
CDMRLC m_lc;
CDMREmbeddedData m_embeddedLC;

14
RewriteSrc.cpp
View File

@@ -29,7 +29,7 @@ CRewriteSrc::CRewriteSrc(const char* name, unsigned int fromSlot, unsigned int f
m_name(name),
m_fromSlot(fromSlot),
m_fromIdStart(fromId),
m_fromIdEnd(fromId + range),
m_fromIdEnd(fromId + range - 1U),
m_toSlot(toSlot),
m_toTG(toTG),
m_trace(trace),
@@ -51,7 +51,10 @@ bool CRewriteSrc::processRF(CDMRData& data)
bool ret = process(data);
if (m_trace)
LogDebug("Rule Trace,\tRewriteSrc %s Slot=%u Src=%u-%u: %s", m_name, m_fromSlot, m_fromIdStart, m_fromIdEnd, ret ? "matched" : "not matched");
LogDebug("Rule Trace,\tRewriteSrc from %s Slot=%u Src=%u-%u: %s", m_name, m_fromSlot, m_fromIdStart, m_fromIdEnd, ret ? "matched" : "not matched");
if (m_trace && ret)
LogDebug("Rule Trace,\tRewriteSrc to %s Slot=%u Dst=TG%u", m_name, m_toSlot, m_toTG);
return ret;
}
@@ -61,7 +64,10 @@ bool CRewriteSrc::processNet(CDMRData& data)
bool ret = process(data);
if (m_trace)
LogDebug("Rule Trace,\tRewriteSrc %s Slot=%u Src=%u-%u: %s", m_name, m_fromSlot, m_fromIdStart, m_fromIdEnd, ret ? "matched" : "not matched");
LogDebug("Rule Trace,\tRewriteSrc from %s Slot=%u Src=%u-%u: %s", m_name, m_fromSlot, m_fromIdStart, m_fromIdEnd, ret ? "matched" : "not matched");
if (m_trace && ret)
LogDebug("Rule Trace,\tRewriteSrc to %s Slot=%u Dst=TG%u", m_name, m_toSlot, m_toTG);
return ret;
}
@@ -72,7 +78,7 @@ bool CRewriteSrc::process(CDMRData& data)
unsigned int srcId = data.getSrcId();
unsigned int slotNo = data.getSlotNo();
if (flco != FLCO_USER_USER || slotNo != m_fromSlot || srcId < m_fromIdStart || srcId >= m_fromIdEnd)
if (flco != FLCO_USER_USER || slotNo != m_fromSlot || srcId < m_fromIdStart || srcId > m_fromIdEnd)
return false;
if (m_fromSlot != m_toSlot)

15
RewriteTG.cpp
View File

@@ -29,9 +29,10 @@ CRewriteTG::CRewriteTG(const char* name, unsigned int fromSlot, unsigned int fro
m_name(name),
m_fromSlot(fromSlot),
m_fromTGStart(fromTG),
m_fromTGEnd(fromTG + range),
m_fromTGEnd(fromTG + range - 1U),
m_toSlot(toSlot),
m_toTGStart(toTG),
m_toTGEnd(toTG + range - 1U),
m_trace(trace),
m_lc(FLCO_GROUP, 0U, toTG),
m_embeddedLC()
@@ -49,7 +50,10 @@ bool CRewriteTG::processRF(CDMRData& data)
bool ret = process(data);
if (m_trace)
LogDebug("Rule Trace,\tRewriteTG %s Slot=%u Dst=TG%u-TG%u: %s", m_name, m_fromSlot, m_fromTGStart, m_fromTGEnd, ret ? "matched" : "not matched");
LogDebug("Rule Trace,\tRewriteTG from %s Slot=%u Dst=TG%u-TG%u: %s", m_name, m_fromSlot, m_fromTGStart, m_fromTGEnd, ret ? "matched" : "not matched");
if (m_trace && ret)
LogDebug("Rule Trace,\tRewriteTG to %s Slot=%u Dst=TG%u-TG%u", m_name, m_toSlot, m_toTGStart, m_toTGEnd);
return ret;
}
@@ -59,7 +63,10 @@ bool CRewriteTG::processNet(CDMRData& data)
bool ret = process(data);
if (m_trace)
LogDebug("Rule Trace,\tRewriteTG %s Slot=%u Dst=TG%u-TG%u: %s", m_name, m_fromSlot, m_fromTGStart, m_fromTGEnd, ret ? "matched" : "not matched");
LogDebug("Rule Trace,\tRewriteTG from %s Slot=%u Dst=TG%u-TG%u: %s", m_name, m_fromSlot, m_fromTGStart, m_fromTGEnd, ret ? "matched" : "not matched");
if (m_trace && ret)
LogDebug("Rule Trace,\tRewriteTG to %s Slot=%u Dst=TG%u-TG%u", m_name, m_toSlot, m_toTGStart, m_toTGEnd);
return ret;
}
@@ -70,7 +77,7 @@ bool CRewriteTG::process(CDMRData& data)
unsigned int dstId = data.getDstId();
unsigned int slotNo = data.getSlotNo();
if (flco != FLCO_GROUP || slotNo != m_fromSlot || dstId < m_fromTGStart || dstId >= m_fromTGEnd)
if (flco != FLCO_GROUP || slotNo != m_fromSlot || dstId < m_fromTGStart || dstId > m_fromTGEnd)
return false;
if (m_fromSlot != m_toSlot)

1
RewriteTG.h
View File

@@ -39,6 +39,7 @@ private:
unsigned int m_fromTGEnd;
unsigned int m_toSlot;
unsigned int m_toTGStart;
unsigned int m_toTGEnd;
bool m_trace;
CDMRLC m_lc;
CDMREmbeddedData m_embeddedLC;