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https://github.com/g4klx/DMRGateway
synced 2025-12-23 06:45:39 +08:00
Add basic rule tracing.
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@@ -25,12 +25,13 @@
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#include <cstdio>
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#include <cassert>
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CRewriteType::CRewriteType(const char* name, unsigned int fromSlot, unsigned int fromTG, unsigned int toSlot, unsigned int toId) :
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CRewriteType::CRewriteType(const char* name, unsigned int fromSlot, unsigned int fromTG, unsigned int toSlot, unsigned int toId, bool trace) :
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m_name(name),
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m_fromSlot(fromSlot),
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m_fromTG(fromTG),
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m_toSlot(toSlot),
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m_toId(toId),
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m_trace(trace),
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m_lc(FLCO_USER_USER, 0U, toId),
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m_embeddedLC()
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{
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@@ -44,18 +45,28 @@ CRewriteType::~CRewriteType()
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bool CRewriteType::processRF(CDMRData& data)
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{
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return process(data);
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bool ret = process(data);
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if (m_trace)
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LogDebug("Rule Trace,\tRewriteType %s Slot=%u Dst=TG%u: %s", m_name, m_fromSlot, m_fromTG, ret ? "matched" : "not matched");
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return ret;
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}
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bool CRewriteType::processNet(CDMRData& data)
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{
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return process(data);
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bool ret = process(data);
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if (m_trace)
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LogDebug("Rule Trace,\tRewriteType %s Slot=%u Dst=TG%u: %s", m_name, m_fromSlot, m_fromTG, ret ? "matched" : "not matched");
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return ret;
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}
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bool CRewriteType::process(CDMRData& data)
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{
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FLCO flco = data.getFLCO();
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unsigned int dstId = data.getDstId();
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FLCO flco = data.getFLCO();
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unsigned int dstId = data.getDstId();
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unsigned int slotNo = data.getSlotNo();
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if (flco != FLCO_GROUP || slotNo != m_fromSlot || dstId != m_fromTG)
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