mirror of
https://github.com/g4klx/DMRGateway
synced 2025-12-21 05:25:40 +08:00
Add Pass All parameters for TGs and Private Calls.
This commit is contained in:
36
Conf.cpp
36
Conf.cpp
@@ -65,6 +65,8 @@ m_dmrNetwork1TGRewrites(),
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m_dmrNetwork1PCRewrites(),
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m_dmrNetwork1TypeRewrites(),
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m_dmrNetwork1SrcRewrites(),
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m_dmrNetwork1PassAllPC(),
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m_dmrNetwork1PassAllTG(),
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m_dmrNetwork2Enabled(false),
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m_dmrNetwork2Id(0U),
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m_dmrNetwork2Address(),
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@@ -77,6 +79,8 @@ m_dmrNetwork2TGRewrites(),
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m_dmrNetwork2PCRewrites(),
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m_dmrNetwork2TypeRewrites(),
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m_dmrNetwork2SrcRewrites(),
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m_dmrNetwork2PassAllPC(),
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m_dmrNetwork2PassAllTG(),
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m_xlxNetwork1Enabled(false),
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m_xlxNetwork1Id(0U),
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m_xlxNetwork1Address(),
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@@ -302,6 +306,12 @@ bool CConf::read()
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rewrite.m_range = ::atoi(p5);
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m_dmrNetwork1SrcRewrites.push_back(rewrite);
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}
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} else if (::strcmp(key, "PassAllPC") == 0) {
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unsigned int slotNo = (unsigned int)::atoi(value);
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m_dmrNetwork1PassAllPC.push_back(slotNo);
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} else if (::strcmp(key, "PassAllTG") == 0) {
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unsigned int slotNo = (unsigned int)::atoi(value);
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m_dmrNetwork1PassAllTG.push_back(slotNo);
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}
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} else if (section == SECTION_DMR_NETWORK_2) {
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if (::strcmp(key, "Enabled") == 0)
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@@ -378,6 +388,12 @@ bool CConf::read()
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rewrite.m_range = ::atoi(p5);
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m_dmrNetwork2SrcRewrites.push_back(rewrite);
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}
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} else if (::strcmp(key, "PassAllPC") == 0) {
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unsigned int slotNo = (unsigned int)::atoi(value);
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m_dmrNetwork2PassAllPC.push_back(slotNo);
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} else if (::strcmp(key, "PassAllTG") == 0) {
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unsigned int slotNo = (unsigned int)::atoi(value);
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m_dmrNetwork2PassAllTG.push_back(slotNo);
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}
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}
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}
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@@ -627,6 +643,16 @@ std::vector<CSrcRewriteStruct> CConf::getDMRNetwork1SrcRewrites() const
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return m_dmrNetwork1SrcRewrites;
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}
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std::vector<unsigned int> CConf::getDMRNetwork1PassAllPC() const
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{
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return m_dmrNetwork1PassAllPC;
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}
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std::vector<unsigned int> CConf::getDMRNetwork1PassAllTG() const
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{
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return m_dmrNetwork1PassAllTG;
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}
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bool CConf::getDMRNetwork2Enabled() const
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{
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return m_dmrNetwork2Enabled;
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@@ -686,3 +712,13 @@ std::vector<CSrcRewriteStruct> CConf::getDMRNetwork2SrcRewrites() const
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{
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return m_dmrNetwork2SrcRewrites;
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}
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std::vector<unsigned int> CConf::getDMRNetwork2PassAllPC() const
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{
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return m_dmrNetwork2PassAllPC;
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}
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std::vector<unsigned int> CConf::getDMRNetwork2PassAllTG() const
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{
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return m_dmrNetwork2PassAllTG;
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}
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8
Conf.h
8
Conf.h
@@ -94,6 +94,8 @@ public:
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std::vector<CPCRewriteStruct> getDMRNetwork1PCRewrites() const;
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std::vector<CTypeRewriteStruct> getDMRNetwork1TypeRewrites() const;
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std::vector<CSrcRewriteStruct> getDMRNetwork1SrcRewrites() const;
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std::vector<unsigned int> getDMRNetwork1PassAllPC() const;
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std::vector<unsigned int> getDMRNetwork1PassAllTG() const;
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// The DMR Network 2 section
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bool getDMRNetwork2Enabled() const;
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@@ -108,6 +110,8 @@ public:
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std::vector<CPCRewriteStruct> getDMRNetwork2PCRewrites() const;
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std::vector<CTypeRewriteStruct> getDMRNetwork2TypeRewrites() const;
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std::vector<CSrcRewriteStruct> getDMRNetwork2SrcRewrites() const;
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std::vector<unsigned int> getDMRNetwork2PassAllPC() const;
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std::vector<unsigned int> getDMRNetwork2PassAllTG() const;
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// The XLX Network 1 section
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bool getXLXNetwork1Enabled() const;
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@@ -166,6 +170,8 @@ private:
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std::vector<CPCRewriteStruct> m_dmrNetwork1PCRewrites;
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std::vector<CTypeRewriteStruct> m_dmrNetwork1TypeRewrites;
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std::vector<CSrcRewriteStruct> m_dmrNetwork1SrcRewrites;
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std::vector<unsigned int> m_dmrNetwork1PassAllPC;
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std::vector<unsigned int> m_dmrNetwork1PassAllTG;
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bool m_dmrNetwork2Enabled;
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unsigned int m_dmrNetwork2Id;
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@@ -179,6 +185,8 @@ private:
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std::vector<CPCRewriteStruct> m_dmrNetwork2PCRewrites;
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std::vector<CTypeRewriteStruct> m_dmrNetwork2TypeRewrites;
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std::vector<CSrcRewriteStruct> m_dmrNetwork2SrcRewrites;
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std::vector<unsigned int> m_dmrNetwork2PassAllPC;
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std::vector<unsigned int> m_dmrNetwork2PassAllTG;
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bool m_xlxNetwork1Enabled;
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unsigned int m_xlxNetwork1Id;
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@@ -21,6 +21,8 @@
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#include "DMRGateway.h"
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#include "StopWatch.h"
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#include "RewritePC.h"
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#include "PassAllPC.h"
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#include "PassAllTG.h"
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#include "Version.h"
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#include "Thread.h"
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#include "Voice.h"
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@@ -778,6 +780,28 @@ bool CDMRGateway::createDMRNetwork1()
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m_dmr1NetRewrites.push_back(rewrite);
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}
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std::vector<unsigned int> tgPassAll = m_conf.getDMRNetwork2PassAllTG();
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for (std::vector<unsigned int>::const_iterator it = tgPassAll.begin(); it != tgPassAll.end(); ++it) {
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LogInfo(" Pass All TG: %u", *it);
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CPassAllTG* rfPassAllTG = new CPassAllTG("DMR-1", *it);
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CPassAllTG* netPassAllTG = new CPassAllTG("DMR-1", *it);
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m_dmr1RFRewrites.push_back(rfPassAllTG);
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m_dmr1NetRewrites.push_back(netPassAllTG);
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}
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std::vector<unsigned int> pcPassAll = m_conf.getDMRNetwork2PassAllPC();
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for (std::vector<unsigned int>::const_iterator it = pcPassAll.begin(); it != pcPassAll.end(); ++it) {
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LogInfo(" Pass All PC: %u", *it);
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CPassAllPC* rfPassAllPC = new CPassAllPC("DMR-1", *it);
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CPassAllPC* netPassAllPC = new CPassAllPC("DMR-1", *it);
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m_dmr1RFRewrites.push_back(rfPassAllPC);
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m_dmr1NetRewrites.push_back(netPassAllPC);
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}
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return true;
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}
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@@ -864,6 +888,28 @@ bool CDMRGateway::createDMRNetwork2()
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m_dmr2NetRewrites.push_back(rewrite);
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}
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std::vector<unsigned int> tgPassAll = m_conf.getDMRNetwork2PassAllTG();
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for (std::vector<unsigned int>::const_iterator it = tgPassAll.begin(); it != tgPassAll.end(); ++it) {
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LogInfo(" Pass All TG: %u", *it);
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CPassAllTG* rfPassAllTG = new CPassAllTG("DMR-2", *it);
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CPassAllTG* netPassAllTG = new CPassAllTG("DMR-2", *it);
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m_dmr2RFRewrites.push_back(rfPassAllTG);
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m_dmr2NetRewrites.push_back(netPassAllTG);
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}
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std::vector<unsigned int> pcPassAll = m_conf.getDMRNetwork2PassAllPC();
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for (std::vector<unsigned int>::const_iterator it = pcPassAll.begin(); it != pcPassAll.end(); ++it) {
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LogInfo(" Pass All PC: %u", *it);
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CPassAllPC* rfPassAllPC = new CPassAllPC("DMR-2", *it);
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CPassAllPC* netPassAllPC = new CPassAllPC("DMR-2", *it);
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m_dmr2RFRewrites.push_back(rfPassAllPC);
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m_dmr2NetRewrites.push_back(netPassAllPC);
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}
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return true;
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}
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@@ -60,6 +60,9 @@ TypeRewrite=1,9990,1,9990
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SrcRewrite=1,9990,1,9990,1
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# Reflector status returns
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SrcRewrite=2,4000,2,9,1001
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# Pass all of the other private traffic on slot 1 and slot 2
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PassAllPC=1
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PassAllPC=2
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Password=PASSWORD
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Debug=0
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@@ -75,5 +78,8 @@ TGRewrite=2,8,2,9,1
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TGRewrite=2,9990,2,9990,1
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# Reflector control command slot 2 84000->4000 to 85000->5000
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PCRewrite=2,84000,2,4000,1001
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# Pass all of the other talk group traffic on slot 1 and slot 2
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PassAllTG=1
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PassAllTG=2
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Password=PASSWORD
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Debug=0
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@@ -168,6 +168,8 @@
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<ClInclude Include="Hamming.h" />
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<ClInclude Include="Log.h" />
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<ClInclude Include="MMDVMNetwork.h" />
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<ClInclude Include="PassAllPC.h" />
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<ClInclude Include="PassAllTG.h" />
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<ClInclude Include="QR1676.h" />
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<ClInclude Include="RepeaterProtocol.h" />
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<ClInclude Include="Rewrite.h" />
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@@ -203,6 +205,8 @@
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<ClCompile Include="Hamming.cpp" />
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<ClCompile Include="Log.cpp" />
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<ClCompile Include="MMDVMNetwork.cpp" />
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<ClCompile Include="PassAllPC.cpp" />
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<ClCompile Include="PassAllTG.cpp" />
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<ClCompile Include="QR1676.cpp" />
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<ClCompile Include="RepeaterProtocol.cpp" />
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<ClCompile Include="Rewrite.cpp" />
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@@ -113,6 +113,12 @@
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<ClInclude Include="RewriteType.h">
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<Filter>Header Files</Filter>
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</ClInclude>
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<ClInclude Include="PassAllPC.h">
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<Filter>Header Files</Filter>
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</ClInclude>
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<ClInclude Include="PassAllTG.h">
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<Filter>Header Files</Filter>
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</ClInclude>
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</ItemGroup>
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<ItemGroup>
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<ClCompile Include="Conf.cpp">
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@@ -208,5 +214,11 @@
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<ClCompile Include="RewriteType.cpp">
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<Filter>Source Files</Filter>
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</ClCompile>
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<ClCompile Include="PassAllPC.cpp">
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<Filter>Source Files</Filter>
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</ClCompile>
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<ClCompile Include="PassAllTG.cpp">
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<Filter>Source Files</Filter>
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</ClCompile>
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</ItemGroup>
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</Project>
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4
Makefile
4
Makefile
@@ -5,8 +5,8 @@ LIBS = -lpthread
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LDFLAGS = -g
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OBJECTS = BPTC19696.o Conf.o CRC.o DMRData.o DMREmbeddedData.o DMREMB.o DMRFullLC.o DMRGateway.o DMRLC.o DMRNetwork.o DMRSlotType.o Golay2087.o Hamming.o Log.o \
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MMDVMNetwork.o QR1676.o RepeaterProtocol.o Rewrite.o RewritePC.o RewriteSrc.o RewriteTG.o RewriteType.o RS129.o SHA256.o StopWatch.o Sync.o \
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Thread.o Timer.o UDPSocket.o Utils.o Voice.o
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MMDVMNetwork.o PassAllPC.o PassAllTG.o QR1676.o RepeaterProtocol.o Rewrite.o RewritePC.o RewriteSrc.o RewriteTG.o RewriteType.o RS129.o SHA256.o StopWatch.o \
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Sync.o Thread.o Timer.o UDPSocket.o Utils.o Voice.o
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all: DMRGateway
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53
PassAllPC.cpp
Normal file
53
PassAllPC.cpp
Normal file
@@ -0,0 +1,53 @@
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/*
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||||
* Copyright (C) 2017 by Jonathan Naylor G4KLX
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||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
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||||
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#include "PassAllPC.h"
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#include "DMRDefines.h"
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#include <cstdio>
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#include <cassert>
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CPassAllPC::CPassAllPC(const char* name, unsigned int slot) :
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m_name(name),
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m_slot(slot)
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{
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assert(slot == 1U || slot == 2U);
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}
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CPassAllPC::~CPassAllPC()
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{
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}
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bool CPassAllPC::processRF(CDMRData& data)
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{
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return process(data);
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}
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bool CPassAllPC::processNet(CDMRData& data)
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{
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return process(data);
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}
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bool CPassAllPC::process(CDMRData& data)
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{
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FLCO flco = data.getFLCO();
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unsigned int slotNo = data.getSlotNo();
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return flco == FLCO_USER_USER || slotNo == m_slot;
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}
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41
PassAllPC.h
Normal file
41
PassAllPC.h
Normal file
@@ -0,0 +1,41 @@
|
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/*
|
||||
* Copyright (C) 2017 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
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#if !defined(PASSALLPC_H)
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#define PASSALLPC_H
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#include "Rewrite.h"
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#include "DMRData.h"
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class CPassAllPC : public IRewrite {
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public:
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CPassAllPC(const char* name, unsigned int slot);
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virtual ~CPassAllPC();
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virtual bool processRF(CDMRData& data);
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virtual bool processNet(CDMRData& data);
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|
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private:
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const char* m_name;
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unsigned int m_slot;
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|
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bool process(CDMRData& data);
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};
|
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|
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|
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#endif
|
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53
PassAllTG.cpp
Normal file
53
PassAllTG.cpp
Normal file
@@ -0,0 +1,53 @@
|
||||
/*
|
||||
* Copyright (C) 2017 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include "PassAllTG.h"
|
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|
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#include "DMRDefines.h"
|
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|
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#include <cstdio>
|
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#include <cassert>
|
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|
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CPassAllTG::CPassAllTG(const char* name, unsigned int slot) :
|
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m_name(name),
|
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m_slot(slot)
|
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{
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assert(slot == 1U || slot == 2U);
|
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}
|
||||
|
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CPassAllTG::~CPassAllTG()
|
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{
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||||
}
|
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|
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bool CPassAllTG::processRF(CDMRData& data)
|
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{
|
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return process(data);
|
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}
|
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|
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bool CPassAllTG::processNet(CDMRData& data)
|
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{
|
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return process(data);
|
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}
|
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|
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bool CPassAllTG::process(CDMRData& data)
|
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{
|
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FLCO flco = data.getFLCO();
|
||||
unsigned int slotNo = data.getSlotNo();
|
||||
|
||||
return flco == FLCO_GROUP || slotNo == m_slot;
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||||
}
|
||||
41
PassAllTG.h
Normal file
41
PassAllTG.h
Normal file
@@ -0,0 +1,41 @@
|
||||
/*
|
||||
* Copyright (C) 2017 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#if !defined(PASSALLTG_H)
|
||||
#define PASSALLTG_H
|
||||
|
||||
#include "Rewrite.h"
|
||||
#include "DMRData.h"
|
||||
|
||||
class CPassAllTG : public IRewrite {
|
||||
public:
|
||||
CPassAllTG(const char* name, unsigned int slot);
|
||||
virtual ~CPassAllTG();
|
||||
|
||||
virtual bool processRF(CDMRData& data);
|
||||
virtual bool processNet(CDMRData& data);
|
||||
|
||||
private:
|
||||
const char* m_name;
|
||||
unsigned int m_slot;
|
||||
|
||||
bool process(CDMRData& data);
|
||||
};
|
||||
|
||||
|
||||
#endif
|
||||
Reference in New Issue
Block a user