MMDVM/DMRGateway
1
0
Fork 0
mirror of https://github.com/g4klx/DMRGateway synced 2025-12-20 21:25:37 +08:00
Code Issues Packages Projects Releases Wiki Activity

Split RF and network processing functionality.

Browse Source
This commit is contained in:
Jonathan Naylor
2017-05-27 16:26:52 +01:00
parent ee438fd2dc
commit 92bda23094
10 changed files with 62 additions and 13 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
DMRGateway.cpp
View File

@@ -346,12 +346,12 @@ int CDMRGateway::run()
FLCO flco = data.getFLCO();
if (flco == FLCO_GROUP && slotNo == m_xlx1Slot && dstId == m_xlx1TG) {
m_xlx1Rewrite->process(data);
m_xlx1Rewrite->processRF(data);
m_xlxNetwork1->write(data);
status[slotNo] = DMRGWS_XLXREFLECTOR1;
timer[slotNo]->start();
} else if (flco == FLCO_GROUP && slotNo == m_xlx2Slot && dstId == m_xlx2TG) {
m_xlx2Rewrite->process(data);
m_xlx2Rewrite->processRF(data);
m_xlxNetwork2->write(data);
status[slotNo] = DMRGWS_XLXREFLECTOR2;
timer[slotNo]->start();
@@ -423,7 +423,7 @@ int CDMRGateway::run()
if (m_dmrNetwork1 != NULL) {
// Rewrite the slot and/or TG or neither
for (std::vector<IRewrite*>::iterator it = m_dmr1RFRewrites.begin(); it != m_dmr1RFRewrites.end(); ++it) {
bool ret = (*it)->process(data);
bool ret = (*it)->processRF(data);
if (ret) {
rewritten = true;
break;
@@ -444,7 +444,7 @@ int CDMRGateway::run()
if (m_dmrNetwork2 != NULL) {
// Rewrite the slot and/or TG or neither
for (std::vector<IRewrite*>::iterator it = m_dmr2RFRewrites.begin(); it != m_dmr2RFRewrites.end(); ++it) {
bool ret = (*it)->process(data);
bool ret = (*it)->processRF(data);
if (ret) {
rewritten = true;
break;
@@ -468,7 +468,7 @@ int CDMRGateway::run()
ret = m_xlxNetwork1->read(data);
if (ret) {
if (status[m_xlx1Slot] == DMRGWS_NONE || status[m_xlx1Slot] == DMRGWS_XLXREFLECTOR1) {
bool ret = m_rpt1Rewrite->process(data);
bool ret = m_rpt1Rewrite->processNet(data);
if (ret) {
m_repeater->write(data);
status[m_xlx1Slot] = DMRGWS_XLXREFLECTOR1;
@@ -487,7 +487,7 @@ int CDMRGateway::run()
ret = m_xlxNetwork2->read(data);
if (ret) {
if (status[m_xlx2Slot] == DMRGWS_NONE || status[m_xlx2Slot] == DMRGWS_XLXREFLECTOR2) {
bool ret = m_rpt2Rewrite->process(data);
bool ret = m_rpt2Rewrite->processNet(data);
if (ret) {
m_repeater->write(data);
status[m_xlx2Slot] = DMRGWS_XLXREFLECTOR2;
@@ -509,7 +509,7 @@ int CDMRGateway::run()
// Rewrite the slot and/or TG or neither
bool rewritten = false;
for (std::vector<IRewrite*>::iterator it = m_dmr1NetRewrites.begin(); it != m_dmr1NetRewrites.end(); ++it) {
bool ret = (*it)->process(data);
bool ret = (*it)->processNet(data);
if (ret) {
rewritten = true;
break;
@@ -536,7 +536,7 @@ int CDMRGateway::run()
// Rewrite the slot and/or TG or neither
bool rewritten = false;
for (std::vector<IRewrite*>::iterator it = m_dmr2NetRewrites.begin(); it != m_dmr2NetRewrites.end(); ++it) {
bool ret = (*it)->process(data);
bool ret = (*it)->processNet(data);
if (ret) {
rewritten = true;
break;

3
Rewrite.h
View File

@@ -25,7 +25,8 @@ class IRewrite {
public:
virtual ~IRewrite() = 0;
virtual bool process(CDMRData& data) = 0;
virtual bool processRF(CDMRData& data) = 0;
virtual bool processNet(CDMRData& data) = 0;
private:
};

10
RewritePC.cpp
View File

@@ -42,6 +42,16 @@ CRewritePC::~CRewritePC()
{
}
bool CRewritePC::processRF(CDMRData& data)
{
return process(data);
}
bool CRewritePC::processNet(CDMRData& data)
{
return process(data);
}
bool CRewritePC::process(CDMRData& data)
{
FLCO flco = data.getFLCO();

4
RewritePC.h
View File

@@ -29,7 +29,8 @@ public:
CRewritePC(const char* name, unsigned int fromSlot, unsigned int fromId, unsigned int toSlot, unsigned int toId, unsigned int range);
virtual ~CRewritePC();
virtual bool process(CDMRData& data);
virtual bool processRF(CDMRData& data);
virtual bool processNet(CDMRData& data);
private:
const char* m_name;
@@ -41,6 +42,7 @@ private:
CDMRLC m_lc;
CDMREmbeddedData m_embeddedLC;
bool process(CDMRData& data);
void processHeader(CDMRData& data, unsigned int dstId, unsigned char dataType);
void processVoice(CDMRData& data, unsigned int dstId);
};

10
RewriteSrc.cpp
View File

@@ -45,6 +45,16 @@ CRewriteSrc::~CRewriteSrc()
{
}
bool CRewriteSrc::processRF(CDMRData& data)
{
return process(data);
}
bool CRewriteSrc::processNet(CDMRData& data)
{
return process(data);
}
bool CRewriteSrc::process(CDMRData& data)
{
FLCO flco = data.getFLCO();

4
RewriteSrc.h
View File

@@ -29,7 +29,8 @@ public:
CRewriteSrc(const char* name, unsigned int fromSlot, unsigned int fromId, unsigned int toSlot, unsigned int toTG, unsigned int range);
virtual ~CRewriteSrc();
virtual bool process(CDMRData& data);
virtual bool processRF(CDMRData& data);
virtual bool processNet(CDMRData& data);
private:
const char* m_name;
@@ -41,6 +42,7 @@ private:
CDMRLC m_lc;
CDMREmbeddedData m_embeddedLC;
bool process(CDMRData& data);
void processHeader(CDMRData& data, unsigned char dataType);
void processVoice(CDMRData& data);
};

10
RewriteTG.cpp
View File

@@ -42,6 +42,16 @@ CRewriteTG::~CRewriteTG()
{
}
bool CRewriteTG::processRF(CDMRData& data)
{
return process(data);
}
bool CRewriteTG::processNet(CDMRData& data)
{
return process(data);
}
bool CRewriteTG::process(CDMRData& data)
{
FLCO flco = data.getFLCO();

4
RewriteTG.h
View File

@@ -29,7 +29,8 @@ public:
CRewriteTG(const char*name, unsigned int fromSlot, unsigned int fromTG, unsigned int toSlot, unsigned int toTG, unsigned int range);
virtual ~CRewriteTG();
virtual bool process(CDMRData& data);
virtual bool processRF(CDMRData& data);
virtual bool processNet(CDMRData& data);
private:
const char* m_name;
@@ -41,6 +42,7 @@ private:
CDMRLC m_lc;
CDMREmbeddedData m_embeddedLC;
bool process(CDMRData& data);
void processHeader(CDMRData& data, unsigned int tg, unsigned char dataType);
void processVoice(CDMRData& data, unsigned int tg);
};

10
RewriteType.cpp
View File

@@ -42,6 +42,16 @@ CRewriteType::~CRewriteType()
{
}
bool CRewriteType::processRF(CDMRData& data)
{
return process(data);
}
bool CRewriteType::processNet(CDMRData& data)
{
return process(data);
}
bool CRewriteType::process(CDMRData& data)
{
FLCO flco = data.getFLCO();

4
RewriteType.h
View File

@@ -29,7 +29,8 @@ public:
CRewriteType(const char* name, unsigned int fromSlot, unsigned int fromTG, unsigned int toSlot, unsigned int toId);
virtual ~CRewriteType();
virtual bool process(CDMRData& data);
virtual bool processRF(CDMRData& data);
virtual bool processNet(CDMRData& data);
private:
const char* m_name;
@@ -40,6 +41,7 @@ private:
CDMRLC m_lc;
CDMREmbeddedData m_embeddedLC;
bool process(CDMRData& data);
void processHeader(CDMRData& data, unsigned char dataType);
void processVoice(CDMRData& data);
};