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21 lines
310 B
Prolog
21 lines
310 B
Prolog
load(common_pre)
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QT += core dbus network xml
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TARGET = sample_blacksim
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TEMPLATE = app
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CONFIG += console
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CONFIG -= app_bundle
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CONFIG += blackmisc blacksim
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DEPENDPATH += . ../../src/blackmisc
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INCLUDEPATH += . ../../src
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DESTDIR = $$DestRoot/bin
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HEADERS += *.h
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SOURCES += *.cpp
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load(common_post)
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