Merge branch 'master' into GPS

This commit is contained in:
Jonathan Naylor
2017-06-10 11:57:17 +01:00
22 changed files with 299 additions and 145 deletions

View File

@@ -47,6 +47,7 @@ m_rptPort(62032U),
m_localAddress("127.0.0.1"),
m_localPort(62031U),
m_timeout(10U),
m_ruleTrace(false),
m_debug(false),
m_voiceEnabled(true),
m_voiceLanguage("en_GB"),
@@ -191,6 +192,8 @@ bool CConf::read()
m_localAddress = value;
else if (::strcmp(key, "LocalPort") == 0)
m_localPort = (unsigned int)::atoi(value);
else if (::strcmp(key, "RuleTrace") == 0)
m_ruleTrace = ::atoi(value) == 1;
else if (::strcmp(key, "Debug") == 0)
m_debug = ::atoi(value) == 1;
} else if (section == SECTION_LOG) {
@@ -486,6 +489,11 @@ unsigned int CConf::getTimeout() const
return m_timeout;
}
bool CConf::getRuleTrace() const
{
return m_ruleTrace;
}
bool CConf::getDebug() const
{
return m_debug;

2
Conf.h
View File

@@ -70,6 +70,7 @@ public:
unsigned int getRptPort() const;
std::string getLocalAddress() const;
unsigned int getLocalPort() const;
bool getRuleTrace() const;
bool getDebug() const;
// The Log section
@@ -164,6 +165,7 @@ private:
std::string m_localAddress;
unsigned int m_localPort;
unsigned int m_timeout;
bool m_ruleTrace;
bool m_debug;
bool m_voiceEnabled;

View File

@@ -105,6 +105,7 @@ int main(int argc, char** argv)
}
#if !defined(_WIN32) && !defined(_WIN64)
::signal(SIGINT, sigHandler);
::signal(SIGTERM, sigHandler);
::signal(SIGHUP, sigHandler);
#endif
@@ -119,11 +120,14 @@ int main(int argc, char** argv)
delete host;
if (m_signal == 2)
::LogInfo("DMRGateway-%s exited on receipt of SIGINT", VERSION);
if (m_signal == 15)
::LogInfo("Caught SIGTERM, exiting");
::LogInfo("DMRGateway-%s exited on receipt of SIGTERM", VERSION);
if (m_signal == 1)
::LogInfo("Caught SIGHUP, restarting");
::LogInfo("DMRGateway-%s restarted on receipt of SIGHUP", VERSION);
} while (m_signal == 1);
::LogFinalise();
@@ -162,7 +166,11 @@ m_dmr1NetRewrites(),
m_dmr1RFRewrites(),
m_dmr2NetRewrites(),
m_dmr2RFRewrites(),
m_lookup(NULL)
m_dmr1Passalls(),
m_dmr2Passalls(),
m_lookup(NULL),
m_lastSlot1HadNMEA(false),
m_lastSlot2HadNMEA(false)
{
}
@@ -180,6 +188,12 @@ CDMRGateway::~CDMRGateway()
for (std::vector<IRewrite*>::iterator it = m_dmr2RFRewrites.begin(); it != m_dmr2RFRewrites.end(); ++it)
delete *it;
for (std::vector<IRewrite*>::iterator it = m_dmr1Passalls.begin(); it != m_dmr1Passalls.end(); ++it)
delete *it;
for (std::vector<IRewrite*>::iterator it = m_dmr2Passalls.begin(); it != m_dmr2Passalls.end(); ++it)
delete *it;
delete m_rpt1Rewrite;
delete m_xlx1Rewrite;
delete m_rpt2Rewrite;
@@ -292,7 +306,7 @@ int CDMRGateway::run()
while (!m_killed) {
unsigned char config[400U];
unsigned int len = m_repeater->getConfig(config);
if (len > 0U)
if (len > 0U && m_repeater->getId() > 1000U)
break;
m_repeater->clock(10U);
@@ -301,7 +315,6 @@ int CDMRGateway::run()
}
if (m_killed) {
LogMessage("DMRGateway-%s is exiting on receipt of SIGHUP1", VERSION);
m_repeater->close();
delete m_repeater;
return 0;
@@ -309,7 +322,10 @@ int CDMRGateway::run()
LogMessage("MMDVM has connected");
CDMRGateway::createAPRSHelper();
createAPRSHelper();
bool ruleTrace = m_conf.getRuleTrace();
LogInfo("Rule trace: %s", ruleTrace ? "yes" : "no");
if (m_conf.getDMRNetwork1Enabled()) {
ret = createDMRNetwork1();
@@ -376,6 +392,18 @@ int CDMRGateway::run()
status[1U] = DMRGWS_NONE;
status[2U] = DMRGWS_NONE;
unsigned int rfSrcId[3U];
unsigned int rfDstId[3U];
rfSrcId[1U] = rfSrcId[2U] = rfDstId[1U] = rfDstId[2U] = 0U;
unsigned int dmr1SrcId[3U];
unsigned int dmr1DstId[3U];
dmr1SrcId[1U] = dmr1SrcId[2U] = dmr1DstId[1U] = dmr1DstId[2U] = 0U;
unsigned int dmr2SrcId[3U];
unsigned int dmr2DstId[3U];
dmr2SrcId[1U] = dmr2SrcId[2U] = dmr2DstId[1U] = dmr2DstId[2U] = 0U;
CStopWatch stopWatch;
stopWatch.start();
@@ -389,6 +417,7 @@ int CDMRGateway::run()
if (connected && !m_xlx1Connected) {
if (m_xlx1Startup != 4000U) {
writeXLXLink(m_xlx1Id, m_xlx1Startup, m_xlxNetwork1);
LogMessage("XLX-1, Linking to reflector %u at startup", m_xlx1Startup);
if (voice1 != NULL)
voice1->linkedTo(m_xlx1Startup);
}
@@ -396,8 +425,11 @@ int CDMRGateway::run()
m_xlx1Reflector = m_xlx1Startup;
m_xlx1Connected = true;
} else if (!connected && m_xlx1Connected) {
if (m_xlx1Reflector != 4000U && voice1 != NULL)
voice1->unlinked();
if (m_xlx1Reflector != 4000U) {
LogMessage("XLX-1, Unlinking due to loss of connection");
if (voice1 != NULL)
voice1->unlinked();
}
m_xlx1Reflector = 4000U;
m_xlx1Connected = false;
@@ -409,6 +441,7 @@ int CDMRGateway::run()
if (connected && !m_xlx2Connected) {
if (m_xlx2Startup != 4000U) {
writeXLXLink(m_xlx2Id, m_xlx2Startup, m_xlxNetwork2);
LogMessage("XLX-2, Linking to reflector %u at startup", m_xlx2Startup);
if (voice2 != NULL)
voice2->linkedTo(m_xlx2Startup);
}
@@ -416,8 +449,11 @@ int CDMRGateway::run()
m_xlx2Reflector = m_xlx2Startup;
m_xlx2Connected = true;
} else if (!connected && m_xlx2Connected) {
if (m_xlx2Reflector != 4000U && voice2 != NULL)
voice2->unlinked();
if (m_xlx2Reflector != 4000U) {
LogMessage("XLX-2, Unlinking due to loss of connection");
if (voice2 != NULL)
voice2->unlinked();
}
m_xlx2Reflector = 4000U;
m_xlx2Connected = false;
@@ -441,22 +477,27 @@ int CDMRGateway::run()
FLCO flco = data.getFLCO();
if (flco == FLCO_GROUP && slotNo == m_xlx1Slot && dstId == m_xlx1TG) {
m_xlx1Rewrite->processRF(data);
m_xlx1Rewrite->process(data, false);
m_xlxNetwork1->write(data);
status[slotNo] = DMRGWS_XLXREFLECTOR1;
timer[slotNo]->start();
} else if (flco == FLCO_GROUP && slotNo == m_xlx2Slot && dstId == m_xlx2TG) {
m_xlx2Rewrite->processRF(data);
m_xlx2Rewrite->process(data, false);
m_xlxNetwork2->write(data);
status[slotNo] = DMRGWS_XLXREFLECTOR2;
timer[slotNo]->start();
} else if (flco == FLCO_USER_USER && slotNo == m_xlx1Slot && dstId >= m_xlx1Base && dstId <= (m_xlx1Base + 26U)) {
} else if ((dstId <= (m_xlx1Base + 26U) || dstId == (m_xlx1Base + 1000U)) && flco == FLCO_USER_USER && slotNo == m_xlx1Slot && dstId >= m_xlx1Base) {
dstId += 4000U;
dstId -= m_xlx1Base;
if (dstId != m_xlx1Reflector) {
if (dstId == 4000U) {
LogMessage("XLX-1, Unlinking");
} else if (dstId == 5000U) {
if (m_xlx1Reflector != 4000U)
voice1->linkedTo(m_xlx1Reflector);
else
voice1->unlinked();
} else {
if (m_xlx1Reflector != 4000U)
writeXLXLink(srcId, 4000U, m_xlxNetwork1);
@@ -464,9 +505,11 @@ int CDMRGateway::run()
LogMessage("XLX-1, Linking to reflector %u", dstId);
}
writeXLXLink(srcId, dstId, m_xlxNetwork1);
m_xlx1Reflector = dstId;
changed = true;
if (dstId != 5000U ) {
writeXLXLink(srcId, dstId, m_xlxNetwork1);
m_xlx1Reflector = dstId;
changed = true;
}
}
status[slotNo] = DMRGWS_XLXREFLECTOR1;
@@ -484,13 +527,18 @@ int CDMRGateway::run()
}
}
}
} else if (flco == FLCO_USER_USER && slotNo == m_xlx2Slot && dstId >= m_xlx2Base && dstId <= (m_xlx2Base + 26U)) {
} else if ((dstId <= (m_xlx2Base + 26U) || dstId == (m_xlx2Base + 1000U)) && flco == FLCO_USER_USER && slotNo == m_xlx2Slot && dstId >= m_xlx2Base) {
dstId += 4000U;
dstId -= m_xlx2Base;
if (dstId != m_xlx2Reflector) {
if (dstId == 4000U) {
LogMessage("XLX-2, Unlinking");
} else if (dstId == 5000U) {
if (m_xlx2Reflector != 4000U)
voice2->linkedTo(m_xlx2Reflector);
else
voice2->unlinked();
} else {
if (m_xlx2Reflector != 4000U)
writeXLXLink(srcId, 4000U, m_xlxNetwork2);
@@ -498,9 +546,11 @@ int CDMRGateway::run()
LogMessage("XLX-2, Linking to reflector %u", dstId);
}
writeXLXLink(srcId, dstId, m_xlxNetwork2);
m_xlx2Reflector = dstId;
changed = true;
if (dstId != 5000U ) {
writeXLXLink(srcId, dstId, m_xlxNetwork2);
m_xlx2Reflector = dstId;
changed = true;
}
}
status[slotNo] = DMRGWS_XLXREFLECTOR2;
@@ -519,12 +569,27 @@ int CDMRGateway::run()
}
}
} else {
unsigned int slotNo = data.getSlotNo();
unsigned int srcId = data.getSrcId();
unsigned int dstId = data.getDstId();
FLCO flco = data.getFLCO();
bool trace = false;
if (ruleTrace && (srcId != rfSrcId[slotNo] || dstId != rfDstId[slotNo])) {
rfSrcId[slotNo] = srcId;
rfDstId[slotNo] = dstId;
trace = true;
}
if (trace)
LogDebug("Rule Trace, RF transmission: Slot=%u Src=%u Dst=%s%u", slotNo, srcId, flco == FLCO_GROUP ? "TG" : "", dstId);
bool rewritten = false;
if (m_dmrNetwork1 != NULL) {
// Rewrite the slot and/or TG or neither
for (std::vector<IRewrite*>::iterator it = m_dmr1RFRewrites.begin(); it != m_dmr1RFRewrites.end(); ++it) {
bool ret = (*it)->processRF(data);
bool ret = (*it)->process(data, trace);
if (ret) {
rewritten = true;
break;
@@ -532,7 +597,6 @@ int CDMRGateway::run()
}
if (rewritten) {
unsigned int slotNo = data.getSlotNo();
if (status[slotNo] == DMRGWS_NONE || status[slotNo] == DMRGWS_DMRNETWORK1) {
m_dmrNetwork1->write(data);
status[slotNo] = DMRGWS_DMRNETWORK1;
@@ -545,7 +609,7 @@ int CDMRGateway::run()
if (m_dmrNetwork2 != NULL) {
// Rewrite the slot and/or TG or neither
for (std::vector<IRewrite*>::iterator it = m_dmr2RFRewrites.begin(); it != m_dmr2RFRewrites.end(); ++it) {
bool ret = (*it)->processRF(data);
bool ret = (*it)->process(data, trace);
if (ret) {
rewritten = true;
break;
@@ -553,7 +617,6 @@ int CDMRGateway::run()
}
if (rewritten) {
unsigned int slotNo = data.getSlotNo();
if (status[slotNo] == DMRGWS_NONE || status[slotNo] == DMRGWS_DMRNETWORK2) {
m_dmrNetwork2->write(data);
status[slotNo] = DMRGWS_DMRNETWORK2;
@@ -562,6 +625,49 @@ int CDMRGateway::run()
}
}
}
if (!rewritten) {
if (m_dmrNetwork1 != NULL) {
for (std::vector<IRewrite*>::iterator it = m_dmr1Passalls.begin(); it != m_dmr1Passalls.end(); ++it) {
bool ret = (*it)->process(data, trace);
if (ret) {
rewritten = true;
break;
}
}
if (rewritten) {
if (status[slotNo] == DMRGWS_NONE || status[slotNo] == DMRGWS_DMRNETWORK1) {
m_dmrNetwork1->write(data);
status[slotNo] = DMRGWS_DMRNETWORK1;
timer[slotNo]->start();
}
}
}
}
if (!rewritten) {
if (m_dmrNetwork2 != NULL) {
for (std::vector<IRewrite*>::iterator it = m_dmr2Passalls.begin(); it != m_dmr2Passalls.end(); ++it) {
bool ret = (*it)->process(data, trace);
if (ret) {
rewritten = true;
break;
}
}
if (rewritten) {
if (status[slotNo] == DMRGWS_NONE || status[slotNo] == DMRGWS_DMRNETWORK2) {
m_dmrNetwork2->write(data);
status[slotNo] = DMRGWS_DMRNETWORK2;
timer[slotNo]->start();
}
}
}
}
if (!rewritten && trace)
LogDebug("Rule Trace,\tnot matched so rejected");
}
}
@@ -569,7 +675,7 @@ int CDMRGateway::run()
ret = m_xlxNetwork1->read(data);
if (ret) {
if (status[m_xlx1Slot] == DMRGWS_NONE || status[m_xlx1Slot] == DMRGWS_XLXREFLECTOR1) {
bool ret = m_rpt1Rewrite->processNet(data);
bool ret = m_rpt1Rewrite->process(data, false);
if (ret) {
m_repeater->write(data);
status[m_xlx1Slot] = DMRGWS_XLXREFLECTOR1;
@@ -588,7 +694,7 @@ int CDMRGateway::run()
ret = m_xlxNetwork2->read(data);
if (ret) {
if (status[m_xlx2Slot] == DMRGWS_NONE || status[m_xlx2Slot] == DMRGWS_XLXREFLECTOR2) {
bool ret = m_rpt2Rewrite->processNet(data);
bool ret = m_rpt2Rewrite->process(data, false);
if (ret) {
m_repeater->write(data);
status[m_xlx2Slot] = DMRGWS_XLXREFLECTOR2;
@@ -607,10 +713,25 @@ int CDMRGateway::run()
if (m_dmrNetwork1 != NULL) {
ret = m_dmrNetwork1->read(data);
if (ret) {
unsigned int slotNo = data.getSlotNo();
unsigned int srcId = data.getSrcId();
unsigned int dstId = data.getDstId();
FLCO flco = data.getFLCO();
bool trace = false;
if (ruleTrace && (srcId != dmr1SrcId[slotNo] || dstId != dmr1DstId[slotNo])) {
dmr1SrcId[slotNo] = srcId;
dmr1DstId[slotNo] = dstId;
trace = true;
}
if (trace)
LogDebug("Rule Trace, network 1 transmission: Slot=%u Src=%u Dst=%s%u", slotNo, srcId, flco == FLCO_GROUP ? "TG" : "", dstId);
// Rewrite the slot and/or TG or neither
bool rewritten = false;
for (std::vector<IRewrite*>::iterator it = m_dmr1NetRewrites.begin(); it != m_dmr1NetRewrites.end(); ++it) {
bool ret = (*it)->processNet(data);
bool ret = (*it)->process(data, trace);
if (ret) {
rewritten = true;
break;
@@ -618,23 +739,44 @@ int CDMRGateway::run()
}
if (rewritten) {
unsigned int slotNo = data.getSlotNo();
if (status[slotNo] == DMRGWS_NONE || status[slotNo] == DMRGWS_DMRNETWORK1) {
m_repeater->write(data);
status[slotNo] = DMRGWS_DMRNETWORK1;
timer[slotNo]->start();
}
}
if (!rewritten && trace)
LogDebug("Rule Trace,\tnot matched so rejected");
}
ret = m_dmrNetwork1->wantsBeacon();
if (ret)
m_repeater->writeBeacon();
}
if (m_dmrNetwork2 != NULL) {
ret = m_dmrNetwork2->read(data);
if (ret) {
unsigned int slotNo = data.getSlotNo();
unsigned int srcId = data.getSrcId();
unsigned int dstId = data.getDstId();
FLCO flco = data.getFLCO();
bool trace = false;
if (ruleTrace && (srcId != dmr2SrcId[slotNo] || dstId != dmr2DstId[slotNo])) {
dmr2SrcId[slotNo] = srcId;
dmr2DstId[slotNo] = dstId;
trace = true;
}
if (trace)
LogDebug("Rule Trace, network 2 transmission: Slot=%u Src=%u Dst=%s%u", slotNo, srcId, flco == FLCO_GROUP ? "TG" : "", dstId);
// Rewrite the slot and/or TG or neither
bool rewritten = false;
for (std::vector<IRewrite*>::iterator it = m_dmr2NetRewrites.begin(); it != m_dmr2NetRewrites.end(); ++it) {
bool ret = (*it)->processNet(data);
bool ret = (*it)->process(data, trace);
if (ret) {
rewritten = true;
break;
@@ -642,14 +784,20 @@ int CDMRGateway::run()
}
if (rewritten) {
unsigned int slotNo = data.getSlotNo();
if (status[slotNo] == DMRGWS_NONE || status[slotNo] == DMRGWS_DMRNETWORK2) {
m_repeater->write(data);
status[slotNo] = DMRGWS_DMRNETWORK2;
timer[slotNo]->start();
}
}
if (!rewritten && trace)
LogDebug("Rule Trace,\tnot matched so rejected");
}
ret = m_dmrNetwork2->wantsBeacon();
if (ret)
m_repeater->writeBeacon();
}
unsigned char buffer[50U];
@@ -733,8 +881,6 @@ int CDMRGateway::run()
CThread::sleep(10U);
}
LogMessage("DMRGateway-%s is exiting on receipt of SIGHUP1", VERSION);
delete voice1;
delete voice2;
@@ -889,7 +1035,7 @@ bool CDMRGateway::createDMRNetwork1()
CPassAllTG* rfPassAllTG = new CPassAllTG("DMR-1", *it);
CPassAllTG* netPassAllTG = new CPassAllTG("DMR-1", *it);
m_dmr1RFRewrites.push_back(rfPassAllTG);
m_dmr1Passalls.push_back(rfPassAllTG);
m_dmr1NetRewrites.push_back(netPassAllTG);
}
@@ -900,7 +1046,7 @@ bool CDMRGateway::createDMRNetwork1()
CPassAllPC* rfPassAllPC = new CPassAllPC("DMR-1", *it);
CPassAllPC* netPassAllPC = new CPassAllPC("DMR-1", *it);
m_dmr1RFRewrites.push_back(rfPassAllPC);
m_dmr1Passalls.push_back(rfPassAllPC);
m_dmr1NetRewrites.push_back(netPassAllPC);
}
@@ -997,7 +1143,7 @@ bool CDMRGateway::createDMRNetwork2()
CPassAllTG* rfPassAllTG = new CPassAllTG("DMR-2", *it);
CPassAllTG* netPassAllTG = new CPassAllTG("DMR-2", *it);
m_dmr2RFRewrites.push_back(rfPassAllTG);
m_dmr2Passalls.push_back(rfPassAllTG);
m_dmr2NetRewrites.push_back(netPassAllTG);
}
@@ -1008,7 +1154,7 @@ bool CDMRGateway::createDMRNetwork2()
CPassAllPC* rfPassAllPC = new CPassAllPC("DMR-2", *it);
CPassAllPC* netPassAllPC = new CPassAllPC("DMR-2", *it);
m_dmr2RFRewrites.push_back(rfPassAllPC);
m_dmr2Passalls.push_back(rfPassAllPC);
m_dmr2NetRewrites.push_back(netPassAllPC);
}
@@ -1204,19 +1350,19 @@ void CDMRGateway::createAPRSHelper()
char myRxFreq[10];
snprintf(myRxFreq, 10, "%s", config + 8);
unsigned int rxFrequency = atoi(myRxFreq);
unsigned int rxFrequency = (unsigned int)::atoi(myRxFreq);
char myTxFreq[10];
snprintf(myTxFreq, 10, "%s", config + 17);
unsigned int txFrequency = atoi(myTxFreq);
unsigned int txFrequency = (unsigned int)::atoi(myTxFreq);
char myLat[9];
snprintf(myLat, 9, "%s", config + 30);
float latitude = atof(myLat);
float latitude = float(::atof(myLat));
char myLon[10];
snprintf(myLon, 10, "%s", config + 38);
float longitude = atof(myLon);
float longitude = float(::atof(myLon));
char myHeight[4];
snprintf(myHeight, 4, "%s", config + 47 );
@@ -1326,7 +1472,7 @@ void CDMRGateway::extractGPSData(const CDMRData& data)
float latitude = latDeg + (latMin + latSec / 10000) / 60;
float longitude = lonDeg + (lonMin + lonSec / 10000) / 60;
LogDebug("Sending GPS position from %d", srcId);
LogDebug("Sending GPS position from %u", srcId);
m_aprsHelper->send(src.c_str(), latitude * latSign, longitude * longSign, altitude);
}

View File

@@ -71,6 +71,8 @@ private:
std::vector<IRewrite*> m_dmr1RFRewrites;
std::vector<IRewrite*> m_dmr2NetRewrites;
std::vector<IRewrite*> m_dmr2RFRewrites;
std::vector<IRewrite*> m_dmr1Passalls;
std::vector<IRewrite*> m_dmr2Passalls;
CDMRLookup* m_lookup;
bool m_lastSlot1HadNMEA;
bool m_lastSlot2HadNMEA;

View File

@@ -5,6 +5,7 @@ RptAddress=127.0.0.1
RptPort=62032
LocalAddress=127.0.0.1
LocalPort=62031
RuleTrace=0
Daemon=0
Debug=1

View File

@@ -324,7 +324,7 @@ void CDMRNetwork::clock(unsigned int ms)
m_rxData.addData(m_buffer, len);
} else if (::memcmp(m_buffer, "MSTNAK", 6U) == 0) {
if (m_status == RUNNING) {
LogWarning("%s, The master is restarting, logging back in", m_name);
LogWarning("%s, Login to the master has failed, retrying login ...", m_name);
m_status = WAITING_LOGIN;
m_timeoutTimer.start();
m_retryTimer.start();
@@ -332,7 +332,7 @@ void CDMRNetwork::clock(unsigned int ms)
/* Once the modem death spiral has been prevented in Modem.cpp
the Network sometimes times out and reaches here.
We want it to reconnect so... */
LogError("%s, Login to the master has failed, retrying ...", m_name);
LogError("%s, Login to the master has failed, retrying network ...", m_name);
close();
open();
return;

View File

@@ -94,7 +94,7 @@ unsigned int CMMDVMNetwork::getId() const
bool CMMDVMNetwork::open()
{
LogMessage("DMR, Opening MMDVM Network");
LogMessage("MMDVM Network, Opening");
return m_socket.open();
}
@@ -244,10 +244,26 @@ bool CMMDVMNetwork::readTalkerAlias(unsigned char* data, unsigned int& length)
return true;
}
bool CMMDVMNetwork::writeBeacon()
{
unsigned char buffer[20U];
::memcpy(buffer + 0U, "RPTSBKN", 7U);
::memcpy(buffer + 7U, m_netId, 4U);
return m_socket.write(buffer, 11U, m_rptAddress, m_rptPort);
}
void CMMDVMNetwork::close()
{
LogMessage("DMR, Closing MMDVM Network");
unsigned char buffer[HOMEBREW_DATA_PACKET_LENGTH];
::memset(buffer, 0x00U, HOMEBREW_DATA_PACKET_LENGTH);
LogMessage("MMDVM Network, Closing");
::memcpy(buffer + 0U, "MSTCL", 5U);
::memcpy(buffer + 5U, m_netId, 4U);
m_socket.write(buffer, HOMEBREW_DATA_PACKET_LENGTH, m_rptAddress, m_rptPort);
m_socket.close();
}
@@ -257,7 +273,7 @@ void CMMDVMNetwork::clock(unsigned int ms)
unsigned int port;
int length = m_socket.read(m_buffer, BUFFER_LENGTH, address, port);
if (length < 0) {
LogError("DMR, Socket has failed, reopening");
LogError("MMDVM Network, Socket has failed, reopening");
close();
open();
return;
@@ -296,6 +312,8 @@ void CMMDVMNetwork::clock(unsigned int ms)
::memcpy(ack + 0U, "RPTACK", 6U);
::memcpy(ack + 6U, m_netId, 4U);
m_socket.write(ack, 10U, m_rptAddress, m_rptPort);
} else if (::memcmp(m_buffer, "RPTCL", 5U) == 0) {
::LogMessage("MMDVM Network, The connected MMDVM is closing down");
} else if (::memcmp(m_buffer, "RPTC", 4U) == 0) {
m_configLen = length - 8U;
m_configData = new unsigned char[m_configLen];

View File

@@ -50,6 +50,8 @@ public:
virtual bool readTalkerAlias(unsigned char* data, unsigned int& length);
virtual bool writeBeacon();
virtual void clock(unsigned int ms);
virtual void close();

View File

@@ -19,6 +19,7 @@
#include "PassAllPC.h"
#include "DMRDefines.h"
#include "Log.h"
#include <cstdio>
#include <cassert>
@@ -34,20 +35,15 @@ CPassAllPC::~CPassAllPC()
{
}
bool CPassAllPC::processRF(CDMRData& data)
{
return process(data);
}
bool CPassAllPC::processNet(CDMRData& data)
{
return process(data);
}
bool CPassAllPC::process(CDMRData& data)
bool CPassAllPC::process(CDMRData& data, bool trace)
{
FLCO flco = data.getFLCO();
unsigned int slotNo = data.getSlotNo();
return flco == FLCO_USER_USER && slotNo == m_slot;
bool ret = (flco == FLCO_USER_USER && slotNo == m_slot);
if (trace)
LogDebug("Rule Trace,\tPassAllPC %s Slot=%u: %s", m_name, m_slot, ret ? "matched" : "not matched");
return ret;
}

View File

@@ -27,14 +27,11 @@ public:
CPassAllPC(const char* name, unsigned int slot);
virtual ~CPassAllPC();
virtual bool processRF(CDMRData& data);
virtual bool processNet(CDMRData& data);
virtual bool process(CDMRData& data, bool trace);
private:
const char* m_name;
unsigned int m_slot;
bool process(CDMRData& data);
};

View File

@@ -19,6 +19,7 @@
#include "PassAllTG.h"
#include "DMRDefines.h"
#include "Log.h"
#include <cstdio>
#include <cassert>
@@ -34,20 +35,15 @@ CPassAllTG::~CPassAllTG()
{
}
bool CPassAllTG::processRF(CDMRData& data)
{
return process(data);
}
bool CPassAllTG::processNet(CDMRData& data)
{
return process(data);
}
bool CPassAllTG::process(CDMRData& data)
bool CPassAllTG::process(CDMRData& data, bool trace)
{
FLCO flco = data.getFLCO();
unsigned int slotNo = data.getSlotNo();
return flco == FLCO_GROUP && slotNo == m_slot;
bool ret = (flco == FLCO_GROUP && slotNo == m_slot);
if (trace)
LogDebug("Rule Trace,\tPassAllTG %s Slot=%u: %s", m_name, m_slot, ret ? "matched" : "not matched");
return ret;
}

View File

@@ -27,14 +27,11 @@ public:
CPassAllTG(const char* name, unsigned int slot);
virtual ~CPassAllTG();
virtual bool processRF(CDMRData& data);
virtual bool processNet(CDMRData& data);
virtual bool process(CDMRData& data, bool trace);
private:
const char* m_name;
unsigned int m_slot;
bool process(CDMRData& data);
};

View File

@@ -45,6 +45,8 @@ public:
virtual void clock(unsigned int ms) = 0;
virtual bool writeBeacon() = 0;
virtual void close() = 0;
private:

View File

@@ -25,8 +25,7 @@ class IRewrite {
public:
virtual ~IRewrite() = 0;
virtual bool processRF(CDMRData& data) = 0;
virtual bool processNet(CDMRData& data) = 0;
virtual bool process(CDMRData& data, bool trace) = 0;
private:
};

View File

@@ -20,6 +20,7 @@
#include "DMRDefines.h"
#include "DMRFullLC.h"
#include "Log.h"
#include <cstdio>
#include <cassert>
@@ -28,9 +29,10 @@ CRewritePC::CRewritePC(const char* name, unsigned int fromSlot, unsigned int fro
m_name(name),
m_fromSlot(fromSlot),
m_fromIdStart(fromId),
m_fromIdEnd(fromId + range),
m_fromIdEnd(fromId + range - 1U),
m_toSlot(toSlot),
m_toIdStart(toId),
m_toIdEnd(toId + range - 1U),
m_lc(FLCO_USER_USER, 0U, 0U),
m_embeddedLC()
{
@@ -42,24 +44,17 @@ CRewritePC::~CRewritePC()
{
}
bool CRewritePC::processRF(CDMRData& data)
{
return process(data);
}
bool CRewritePC::processNet(CDMRData& data)
{
return process(data);
}
bool CRewritePC::process(CDMRData& data)
bool CRewritePC::process(CDMRData& data, bool trace)
{
FLCO flco = data.getFLCO();
unsigned int dstId = data.getDstId();
unsigned int slotNo = data.getSlotNo();
if (flco != FLCO_USER_USER || slotNo != m_fromSlot || dstId < m_fromIdStart || dstId >= m_fromIdEnd)
if (flco != FLCO_USER_USER || slotNo != m_fromSlot || dstId < m_fromIdStart || dstId > m_fromIdEnd) {
if (trace)
LogDebug("Rule Trace,\tRewritePC from %s Slot=%u Dst=%u-%u: not matched", m_name, m_fromSlot, m_fromIdStart, m_fromIdEnd);
return false;
}
if (m_fromSlot != m_toSlot)
data.setSlotNo(m_toSlot);
@@ -88,6 +83,11 @@ bool CRewritePC::process(CDMRData& data)
}
}
if (trace) {
LogDebug("Rule Trace,\tRewritePC from %s Slot=%u Dst=%u-%u: not matched", m_name, m_fromSlot, m_fromIdStart, m_fromIdEnd);
LogDebug("Rule Trace,\tRewritePC to %s Slot=%u Dst=%u-%u", m_name, m_toSlot, m_toIdStart, m_toIdEnd);
}
return true;
}

View File

@@ -29,8 +29,7 @@ public:
CRewritePC(const char* name, unsigned int fromSlot, unsigned int fromId, unsigned int toSlot, unsigned int toId, unsigned int range);
virtual ~CRewritePC();
virtual bool processRF(CDMRData& data);
virtual bool processNet(CDMRData& data);
virtual bool process(CDMRData& data, bool trace);
private:
const char* m_name;
@@ -39,10 +38,10 @@ private:
unsigned int m_fromIdEnd;
unsigned int m_toSlot;
unsigned int m_toIdStart;
unsigned int m_toIdEnd;
CDMRLC m_lc;
CDMREmbeddedData m_embeddedLC;
bool process(CDMRData& data);
void processHeader(CDMRData& data, unsigned int dstId, unsigned char dataType);
void processVoice(CDMRData& data, unsigned int dstId);
};

View File

@@ -29,7 +29,7 @@ CRewriteSrc::CRewriteSrc(const char* name, unsigned int fromSlot, unsigned int f
m_name(name),
m_fromSlot(fromSlot),
m_fromIdStart(fromId),
m_fromIdEnd(fromId + range),
m_fromIdEnd(fromId + range - 1U),
m_toSlot(toSlot),
m_toTG(toTG),
m_lc(FLCO_GROUP, 0U, toTG),
@@ -45,24 +45,17 @@ CRewriteSrc::~CRewriteSrc()
{
}
bool CRewriteSrc::processRF(CDMRData& data)
{
return process(data);
}
bool CRewriteSrc::processNet(CDMRData& data)
{
return process(data);
}
bool CRewriteSrc::process(CDMRData& data)
bool CRewriteSrc::process(CDMRData& data, bool trace)
{
FLCO flco = data.getFLCO();
unsigned int srcId = data.getSrcId();
unsigned int slotNo = data.getSlotNo();
if (flco != FLCO_USER_USER || slotNo != m_fromSlot || srcId < m_fromIdStart || srcId >= m_fromIdEnd)
if (flco != FLCO_USER_USER || slotNo != m_fromSlot || srcId < m_fromIdStart || srcId > m_fromIdEnd) {
if (trace)
LogDebug("Rule Trace,\tRewriteSrc from %s Slot=%u Src=%u-%u: not matched", m_name, m_fromSlot, m_fromIdStart, m_fromIdEnd);
return false;
}
if (m_fromSlot != m_toSlot)
data.setSlotNo(m_toSlot);
@@ -88,6 +81,11 @@ bool CRewriteSrc::process(CDMRData& data)
break;
}
if (trace) {
LogDebug("Rule Trace,\tRewriteSrc from %s Slot=%u Src=%u-%u: matched", m_name, m_fromSlot, m_fromIdStart, m_fromIdEnd);
LogDebug("Rule Trace,\tRewriteSrc to %s Slot=%u Dst=TG%u", m_name, m_toSlot, m_toTG);
}
return true;
}

View File

@@ -29,8 +29,7 @@ public:
CRewriteSrc(const char* name, unsigned int fromSlot, unsigned int fromId, unsigned int toSlot, unsigned int toTG, unsigned int range);
virtual ~CRewriteSrc();
virtual bool processRF(CDMRData& data);
virtual bool processNet(CDMRData& data);
virtual bool process(CDMRData& data, bool trace);
private:
const char* m_name;
@@ -42,7 +41,6 @@ private:
CDMRLC m_lc;
CDMREmbeddedData m_embeddedLC;
bool process(CDMRData& data);
void processHeader(CDMRData& data, unsigned char dataType);
void processVoice(CDMRData& data);
};

View File

@@ -20,6 +20,7 @@
#include "DMRDefines.h"
#include "DMRFullLC.h"
#include "Log.h"
#include <cstdio>
#include <cassert>
@@ -28,9 +29,10 @@ CRewriteTG::CRewriteTG(const char* name, unsigned int fromSlot, unsigned int fro
m_name(name),
m_fromSlot(fromSlot),
m_fromTGStart(fromTG),
m_fromTGEnd(fromTG + range),
m_fromTGEnd(fromTG + range - 1U),
m_toSlot(toSlot),
m_toTGStart(toTG),
m_toTGEnd(toTG + range - 1U),
m_lc(FLCO_GROUP, 0U, toTG),
m_embeddedLC()
{
@@ -42,24 +44,17 @@ CRewriteTG::~CRewriteTG()
{
}
bool CRewriteTG::processRF(CDMRData& data)
{
return process(data);
}
bool CRewriteTG::processNet(CDMRData& data)
{
return process(data);
}
bool CRewriteTG::process(CDMRData& data)
bool CRewriteTG::process(CDMRData& data, bool trace)
{
FLCO flco = data.getFLCO();
unsigned int dstId = data.getDstId();
unsigned int slotNo = data.getSlotNo();
if (flco != FLCO_GROUP || slotNo != m_fromSlot || dstId < m_fromTGStart || dstId >= m_fromTGEnd)
if (flco != FLCO_GROUP || slotNo != m_fromSlot || dstId < m_fromTGStart || dstId > m_fromTGEnd) {
if (trace)
LogDebug("Rule Trace,\tRewriteTG from %s Slot=%u Dst=TG%u-TG%u: not matched", m_name, m_fromSlot, m_fromTGStart, m_fromTGEnd);
return false;
}
if (m_fromSlot != m_toSlot)
data.setSlotNo(m_toSlot);
@@ -88,6 +83,11 @@ bool CRewriteTG::process(CDMRData& data)
}
}
if (trace) {
LogDebug("Rule Trace,\tRewriteTG from %s Slot=%u Dst=TG%u-TG%u: matched", m_name, m_fromSlot, m_fromTGStart, m_fromTGEnd);
LogDebug("Rule Trace,\tRewriteTG to %s Slot=%u Dst=TG%u-TG%u", m_name, m_toSlot, m_toTGStart, m_toTGEnd);
}
return true;
}

View File

@@ -29,8 +29,7 @@ public:
CRewriteTG(const char*name, unsigned int fromSlot, unsigned int fromTG, unsigned int toSlot, unsigned int toTG, unsigned int range);
virtual ~CRewriteTG();
virtual bool processRF(CDMRData& data);
virtual bool processNet(CDMRData& data);
virtual bool process(CDMRData& data, bool trace);
private:
const char* m_name;
@@ -39,10 +38,10 @@ private:
unsigned int m_fromTGEnd;
unsigned int m_toSlot;
unsigned int m_toTGStart;
unsigned int m_toTGEnd;
CDMRLC m_lc;
CDMREmbeddedData m_embeddedLC;
bool process(CDMRData& data);
void processHeader(CDMRData& data, unsigned int tg, unsigned char dataType);
void processVoice(CDMRData& data, unsigned int tg);
};

View File

@@ -42,24 +42,17 @@ CRewriteType::~CRewriteType()
{
}
bool CRewriteType::processRF(CDMRData& data)
bool CRewriteType::process(CDMRData& data, bool trace)
{
return process(data);
}
bool CRewriteType::processNet(CDMRData& data)
{
return process(data);
}
bool CRewriteType::process(CDMRData& data)
{
FLCO flco = data.getFLCO();
unsigned int dstId = data.getDstId();
FLCO flco = data.getFLCO();
unsigned int dstId = data.getDstId();
unsigned int slotNo = data.getSlotNo();
if (flco != FLCO_GROUP || slotNo != m_fromSlot || dstId != m_fromTG)
if (flco != FLCO_GROUP || slotNo != m_fromSlot || dstId != m_fromTG) {
if (trace)
LogDebug("Rule Trace,\tRewriteType %s Slot=%u Dst=TG%u: not matched", m_name, m_fromSlot, m_fromTG);
return false;
}
if (m_fromSlot != m_toSlot)
data.setSlotNo(m_toSlot);
@@ -85,6 +78,9 @@ bool CRewriteType::process(CDMRData& data)
break;
}
if (trace)
LogDebug("Rule Trace,\tRewriteType %s Slot=%u Dst=TG%u: matched", m_name, m_fromSlot, m_fromTG);
return true;
}

View File

@@ -29,8 +29,7 @@ public:
CRewriteType(const char* name, unsigned int fromSlot, unsigned int fromTG, unsigned int toSlot, unsigned int toId);
virtual ~CRewriteType();
virtual bool processRF(CDMRData& data);
virtual bool processNet(CDMRData& data);
virtual bool process(CDMRData& data, bool trace);
private:
const char* m_name;
@@ -41,7 +40,6 @@ private:
CDMRLC m_lc;
CDMREmbeddedData m_embeddedLC;
bool process(CDMRData& data);
void processHeader(CDMRData& data, unsigned char dataType);
void processVoice(CDMRData& data);
};